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HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
分类和应用:
文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 19 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits  
19.2.3  
Reset Source Decision Register (LVDRF)  
LVDSR indicates sources of resets.  
Initial  
Bit  
Bit Name Value  
R/W  
Description  
7 to 2  
Reserved  
The read value is undefined and these bits cannot be  
modified.  
1
1
0
PRST  
*
R/W  
R/W  
POR/LVDR Detection  
[Setting conditions]  
When a power-on reset has occurred  
When an LVDR has occurred  
[Clearing condition]  
When writing 0  
2
WRST  
*
WDT Reset Detection  
[Setting condition]  
When a reset by the WDT has occurred  
[Clearing conditions]  
When a power-on reset has occurred  
When an LVDR has occurred  
When an reset signal input on the external pin has  
asserted  
When writing 0  
Notes: 1. The initial value depends on the condition when the PRST bit is set or cleared.  
2. The initial value depends on the condition when the WRST bit is set or cleared.  
Rev. 3.00 Sep. 10, 2007 Page 385 of 528  
REJ09B0216-0300  
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