Section 18 A/D Converter
Initial
Bit Name Value
Bit
2
R/W
R/W
R/W
R/W
Description
CH2
CH1
CH0
0
0
0
Channel Select 2 to 0
Select analog input channels.
1
0
When SCAN = 0
000: AN0
001: AN1
010: AN2
011: AN3
100: AN4
101: AN5
110: AN6
111: AN7
When SCAN = 1
000: AN0
001: AN0 and AN1
010: AN0 to AN2
011: AN0 to AN3
100: AN4
101: AN4 and AN5
110: AN4 to AN6
111: AN4 to AN7
18.3.3
A/D Control Register (ADCR)
ADCR enables A/D conversion started by an external trigger signal.
Initial
Bit
Bit Name Value
R/W
Description
7
TRGE
0
R/W
Trigger Enable
A/D conversion is started at the falling edge and the rising
edge of the external trigger signal (ADTRG) when this bit is
set to 1.
The selection between the falling edge and rising edge of
the external trigger pin (ADTRG) conforms to the WPEG5
bit in the interrupt edge select register 2 (IEGR2)
6 to 1
0
—
—
All 1
0
—
Reserved
These bits are always read as 1.
Reserved
R/W
Do not set this bit to 1, though the bit is readable/writable.
Rev. 3.00 Sep. 10, 2007 Page 372 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
