Section 16 Serial Communication Interface 3 (SCI3)
Table 16.3 Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (3)
Operating Frequency φ (MHz)
12.288
N
14
14.7456
16
Bit Rate
(bit/s)
Error
(%)
Error
(%)
Error
(%)
Error
(%)
n
2
2
2
1
1
0
0
0
0
0
0
n
2
2
2
1
1
0
0
0
0
0
—
N
n
3
2
2
1
1
0
0
0
0
0
0
N
n
3
2
2
1
1
0
0
0
0
0
0
N
110
217 0.08
159 0.00
248 –0.17
181 0.16
64
0.70
70
0.03
150
191 0.00
95 0.00
191 0.00
95 0.00
191 0.00
207 0.16
103 0.16
207 0.16
103 0.16
207 0.16
103 0.16
300
79
159 0.00
79 0.00
159 0.00
0.00
90
181 0.16
90 0.16
181 0.16
0.16
600
1200
2400
4800
9600
19200
31250
38400
79
39
19
11
9
0.00
0.00
0.00
2.40
0.00
90
45
22
13
—
0.16
–0.93
–0.93
0.00
—
95
47
23
14
11
0.00
0.00
0.00
–1.70
0.00
51
25
15
12
0.16
0.16
0.00
0.16
Operating Frequency φ (MHz)
18 20
Bit Rate
(bit/s)
Error
(%)
Error
(%)
n
3
2
2
1
1
0
0
0
0
0
0
N
n
3
3
2
2
1
1
0
0
0
0
0
N
110
79
–0.12
0.16
0.16
0.16
0.16
0.16
0.16
–0.96
1.02
0.00
–2.34
88
64
–0.25
0.16
0.16
0.16
0.16
0.16
0.16
0.16
–1.36
0.00
1.73
150
233
116
233
116
233
116
58
300
129
64
600
1200
2400
4800
9600
19200
31250
38400
[Legend]
129
64
129
64
28
32
17
19
14
15
—: A setting is available but error occurs.
Rev. 3.00 Sep. 10, 2007 Page 299 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
