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HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
分类和应用:
文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 13 Timer Z  
9. Note on Writing to the TOA0 to TOD0 Bits and the TOA1 to TOD1 Bits in TOCR:  
The TOA0 to TOD0 bits and the TOA1 to TOD1 bits in TOCR decide the value of the FTIO  
pin, which is output until the first compare match occurs. Once a compare match occurs and  
this compare match changes the values of FTIOA0 to FTIOD0 and FTIOA1 to FTIOD1  
output, the values of the FTIOA0 to FTIOD0 and FTIOA1 to FTIOD1 pin output and the  
values read from the TOA0 to TOD0 and TOA1 to TOD1 bits may differ. Moreover, when the  
writing to TOCR and the generation of the compare match A0 to D0 and A1 to D1 occur at the  
same timing, the writing to TOCR has the priority. Thus, output change due to the compare  
match is not reflected to the FTIOA0 to FTIOD0 and FTIOA1 to FTIOD1 pins. Therefore,  
when bit manipulation instruction is used to write to TOCR, the values of the FTIOA0 to  
FTIOD0 and FTIOA1 to FTIOD1 pin output may result in an unexpected result. When TOCR  
is to be written to while compare match is operating, stop the counter once before accessing to  
TOCR, read the port 6 state to reflect the values of FTIOA0 to FTIOD0 and FTIOA1 to  
FTIOD1 output, to TOA0 to TOD0 and TOA1 to TOD1, and then restart the counter. Figure  
13.59 shows an example when the compare match and the bit manipulation instruction to  
TOCR occur at the same timing.  
TOCR has been set to H'06. Compare match B0 and compare match C0 are used. The FTIOB0 pin is in the 1 output state,  
and is set to the toggle output or the 0 output by compare match B0.  
When BCLR#2, @TOCR is executed to clear the TOC0 bit (the FTIOC0 signal is low) and compare match B0 occurs  
at the same timing as shown below, the H'02 writing to TOCR has priority and compare match B0 does not drive the FTIOB0 signal low;  
the FTIOB0 signal remains high.  
7
6
5
4
3
2
1
0
Bit  
TOCR  
Set value  
TOD1  
0
TOC1  
0
TOB1  
0
TOA1  
0
TOD0  
0
TOC0  
1
TOB0  
1
TOA0  
0
BCLR#2, @TOCR  
(1) TOCR read operation: Read H'06  
(2) Modify operation: Modify H'06 to H'02  
(3) Write operation to TOCR: Write H'02  
φ
TOCR  
write signal  
Compare match  
signal B0  
FTIOB0 pin  
Expected output  
Remains high because the 1 writing to TOB has priority  
Figure 13.59 When Compare Match and Bit Manipulation Instruction to TOCR  
Occur at the Same Timing  
Rev. 3.00 Sep. 10, 2007 Page 274 of 528  
REJ09B0216-0300  
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