Section 13 Timer Z
13.4.6
Reset Synchronous PWM Mode
Three normal- and counter-phase PWM waveforms are output by combining channels 0 and 1 that
one of changing points of waveforms will be common.
In reset synchronous PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become
PWM-output pins automatically. TCNT_0 performs an increment operation. Tables 13.4 and
13.5 show the PWM-output pins used and the register settings, respectively.
Figure 13.26 shows the example of reset synchronous PWM mode setting procedure.
Table 13.4 Output Pins in Reset Synchronous PWM Mode
Channel
Pin Name Input/Output
Pin Function
0
0
0
FTIOC0
FTIOB0
FTIOD0
Output
Output
Output
Toggle output in synchronous with PWM cycle
PWM output 1
PWM output 1 (counter-phase waveform of PWM
output 1)
1
1
FTIOA1
FTIOC1
Output
Output
PWM output 2
PWM output 2 (counter-phase waveform of PWM
output 2)
1
1
FTIOB1
FTIOD1
Output
Output
PWM output 3
PWM output 3 (counter-phase waveform of PWM
output 3)
Table 13.5 Register Settings in Reset Synchronous PWM Mode
Register
TCNT_0
TCNT_1
GRA_0
Description
Initial setting of H'0000
Not used (independently operates)
Sets counter cycle of TCNT_0
GRB_0
Set a changing point of the PWM waveform output from pins FTIOB0 and
FTIOD0.
GRA_1
GRB_1
Set a changing point of the PWM waveform output from pins FTIOA1 and
FTIOC1.
Set a changing point of the PWM waveform output from pins FTIOB1 and
FTIOD1.
Rev. 3.00 Sep. 10, 2007 Page 240 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
