Table 2.7 lists the SH7709S arithmetic instructions.
Table 2.7 Arithmetic Instructions
Privileged
Mode Cycles T Bit
Instruction
Operation
Code
ADD
Rm,Rn
Rn + Rm → Rn
Rn + imm → Rn
0011nnnnmmmm1100
0111nnnniiiiiiii
0011nnnnmmmm1110
—
—
—
1
1
1
—
ADD
#imm,Rn
Rm,Rn
—
ADDC
Rn + Rm + T → Rn,
Carry → T
Carry
ADDV
Rm,Rn
Rn + Rm → Rn,
Overflow → T
0011nnnnmmmm1111
10001000iiiiiiii
0011nnnnmmmm0000
0011nnnnmmmm0010
0011nnnnmmmm0011
0011nnnnmmmm0110
0011nnnnmmmm0111
0100nnnn00010001
0100nnnn00010101
0010nnnnmmmm1100
0011nnnnmmmm0100
0010nnnnmmmm0111
0000000000011001
—
—
—
—
—
—
—
—
—
—
—
—
—
1
1
1
1
1
1
1
1
1
1
1
1
1
Overflow
CMP/EQ #imm,R0
CMP/EQ Rm,Rn
CMP/HS Rm,Rn
CMP/GE Rm,Rn
CMP/HI Rm,Rn
CMP/GT Rm,Rn
CMP/PZ Rn
If R0 = imm, 1 → T
Comparison
result
If Rn = Rm, 1 → T
Comparison
result
If Rn ≥ Rm with
unsigned data, 1 → T
Comparison
result
If Rn ≥ Rm with signed
data, 1 → T
Comparison
result
If Rn > Rm with
Comparison
result
unsigned data, 1 → T
If Rn > Rm with signed
Comparison
result
data, 1 → T
If Rn ≥ 0, 1 → T
Comparison
result
CMP/PL Rn
If Rn > 0, 1 → T
Comparison
result
CMP/STR Rm,Rn
If Rn and Rm have an
Comparison
result
equivalent byte, 1 → T
DIV1
Rm,Rn
Rm,Rn
Single-step division
(Rn/Rm)
Calculation
result
DIV0S
DIV0U
MSB of Rn → Q, MSB
of Rm → M, M ^ Q → T
Calculation
result
0 → M/Q/T
0
Rev. 5.00, 09/03, page 41 of 760
RENESAS [ RENESAS TECHNOLOGY CORP ]
