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HD6417709SF133B 参数 Datasheet PDF下载

HD6417709SF133B图片预览
型号: HD6417709SF133B
PDF下载: 下载PDF文件 查看货源
内容描述: 瑞萨32位RISC单片机超级RISC引擎族/ SH7700系列 [Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 807 页 / 4409 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Bits 13 and 12—Source Address Mode Bits 1 and 0 (SM1, SM0): Select whether the DMA  
source address is incremented, decremented, or left fixed.  
Bit 13: SM1  
Bit 12: SM0  
Description  
0
0
0
1
Fixed source address  
(Initial value)  
Source address is incremented (+1 in 8-bit transfer, +2 in 16-  
bit transfer, +4 in 32-bit transfer, +16 in 16-byte transfer)  
1
1
0
1
Source address is decremented (–1 in 8-bit transfer, –2 in 16-  
bit transfer, –4 in 32-bit transfer; illegal setting in 16-byte  
transfer)  
Setting prohibited  
If the transfer source is specified by indirect address, specify the address holding the value of the  
address in which the data to be transferred is stored (i.e. the indirect address) in source address  
register 3 (SAR3).  
Specification of SAR3 incrementing or decrementing in indirect address mode depends on the  
SM1 and SM0 settings. In this case, however, the SAR3 increment or decrement value is +4, –4,  
or fixed at 0, regardless of the transfer data size specified in TS1 and TS0.  
Rev. 5.00, 09/03, page 339 of 760  
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