SCIF I/O port block diagrams are shown in figures 18.6 to 18.9.
Reset
R
Q
D
SPB2IO
C
Internal data bus
SPTRW
Reset
R
MD1/TxD2
Q
D
SPB2DT
C
SCIF
Transmit enable
signal
SPTRW
Mode setting
register
Serial transmit data
SPTRW: Write to SPTR
Figure 18.6 MD1/TxD2 Pin
SCIF
MD2/RxD2
Serial receive
data
Mode setting
register
Internal data bus
SPTRR
SPTRR: Read SPTR
Figure 18.7 MD2/RxD2 Pin
Rev. 6.0, 07/02, page 736 of 986