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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 17 Smart Card Interface  
17.1  
Overview  
The subset of the IC card (smart card) interface conforming to ISO/IEC7816-3 (Identification  
Card) is supported as a serial communication interface (SCI) extension function.  
Switching between the normal serial communication interface and the smart card interface is  
carried out by means of a register setting.  
17.1.1 Features  
Features of the smart card interface are listed below.  
Asynchronous mode  
Data length: 8 bits  
Parity bit generation and checking  
Transmission of error signal (parity error) in receive mode  
Error signal detection and automatic data retransmission in transmit mode  
Direct convention and inverse convention both supported  
On-chip baud rate generator allows any bit rate to be selected  
Three interrupt sources  
There are three interrupt sources—transmit-data-empty, receive-data-full, and transmit/receive  
error—that can issue requests independently.  
The transmit-data-empty interrupt and receive-data-full interrupt can activate the DMA  
controller (DMAC) to execute data transfer.  
Rev. 6.0, 07/02, page 703 of 986  
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