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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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1. ID reception cycle: Set the MPIE  
bit in SCSCR1 to 1.  
Start of reception  
2. SCI status check, ID reception  
and comparison: Read SCSSR1  
and SCSCR1, and check that the  
RDRF flag is set to 1 and MPIE  
bit is set to 0, then read the  
Set MPIE bit in SCSCR1 to 1  
Read ORER and FER flags  
in SCSSR1  
receive data in SCRDR1 and  
compare it with this station’s ID.  
Yes  
FER = 1 or ORER = 1?  
No  
If the data is not this station’s ID,  
set the MPIE bit to 1 again, and  
clear the RDRF flag to 0. If the  
data is this station’s ID, clear the  
RDRF flag to 0.  
Read RDRF flag in SCSSR1  
Read MPIE bit in SCSCR1  
No  
No  
3. SCI status check and data  
reception: Read SCSSR1 and  
check that the RDRF flag is set to  
1, then read the data in SCRDR1.  
RDRF = 1 and MPIE = 0?  
Yes  
Read receive data in SCRDR1  
4. Receive error handling and break  
detection: If a receive error  
occurs, read the ORER and FER  
flags in SCSSR1 to identify the  
error. After performing the  
This station’s ID?  
Yes  
Read ORER and FER flags  
in SCSSR1  
appropriate error handling,  
ensure that the ORER and FER  
flags are all cleared to 0.  
Reception cannot be resumed if  
either of these flags is set to 1. In  
the case of a framing error, a  
break can be detected by reading  
the RxD pin value.  
Yes  
FER = 1 or ORER = 1?  
No  
Read RDRF flag in SCSSR1  
No  
No  
RDRF = 1?  
Yes  
Read receive data in SCRDR1  
All data received?  
Yes  
Error handling  
End of reception  
Figure 15.15 Sample Multiprocessor Serial Reception Flowchart (1)  
Rev. 6.0, 07/02, page 639 of 986  
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