Table 14.2
Table 14.3
Table 14.4
Table 14.5
Table 14.6
Table 14.7
Table 14.8
Table 14.9
Table 14.10
DMAC Pins in DDT Mode ................................................................................ 494
DMAC Registers................................................................................................ 494
Selecting External Request Mode with RS Bits ................................................. 513
Selecting On-Chip Peripheral Module Request Mode with RS Bits.................. 514
Supported DMA Transfers................................................................................. 518
Relationship between DMA Transfer Type, Request Mode, and Bus Mode ..... 524
External Request Transfer Sources and Destinations in Normal Mode ............. 525
External Request Transfer Sources and Destinations in DDT Mode ................. 526
Conditions for Transfer between External Memory and an External Device
with DACK, and Corresponding Register Settings............................................ 544
DMAC Pins........................................................................................................ 575
DMAC Pins in DDT Mode ................................................................................ 576
Register Configuration ....................................................................................... 577
Channel Selection by DTR Format (DMAOR.DBL = 1)................................... 584
Notification of Transfer Channel in Eight-Channel DDT Mode........................ 587
Function of %$9/ ............................................................................................. 587
DTR Format for Clearing Request Queues ........................................................ 588
DMAC Interrupt-Request Codes........................................................................ 589
SCI Pins.............................................................................................................. 596
SCI Registers...................................................................................................... 596
Examples of Bit Rates and SCBRR1 Settings in Asynchronous Mode ............. 615
Examples of Bit Rates and SCBRR1 Settings in Synchronous Mode................ 618
Maximum Bit Rate for Various Frequencies with Baud Rate Generator
Table 14.11
Table 14.12
Table 14.13
Table 14.14
Table 14.15
Table 14.16
Table 14.17
Table 14.18
Table 15.1
Table 15.2
Table 15.3
Table 15.4
Table 15.5
(Asynchronous Mode)........................................................................................ 619
Maximum Bit Rate with External Clock Input (Asynchronous Mode).............. 620
Maximum Bit Rate with External Clock Input (Synchronous Mode)................ 620
SCSMR1 Settings for Serial Transfer Format Selection.................................... 622
SCSMR1 and SCSCR1 Settings for SCI Clock Source Selection...................... 622
Serial Transfer Formats (Asynchronous Mode)................................................. 624
Receive Error Conditions................................................................................... 632
SCI Interrupt Sources......................................................................................... 651
SCSSR1 Status Flags and Transfer of Receive Data.......................................... 652
SCIF Pins ........................................................................................................... 660
SCIF Registers.................................................................................................... 661
SCSMR2 Settings for Serial Transfer Format Selection.................................... 685
SCSCR2 Settings for SCIF Clock Source Selection .......................................... 686
Serial Transmit/Receive Formats ....................................................................... 687
SCIF Interrupt Sources....................................................................................... 697
Smart Card Interface Pins .................................................................................. 705
Smart Card Interface Registers........................................................................... 705
Smart Card Interface Register Settings .............................................................. 713
Values of n and Corresponding CKS1 and CKS0 Settings ................................ 715
Examples of Bit Rate B (bits/s) for Various SCBRR1 Settings (When n = 0)... 716
Table 15.6
Table 15.7
Table 15.8
Table 15.9
Table 15.10
Table 15.11
Table 15.12
Table 15.13
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Table 16.5
Table 16.6
Table 17.1
Table 17.2
Table 17.3
Table 17.4
Table 17.5
Rev. 6.0, 07/02, page xlviii of I
RENESAS [ RENESAS TECHNOLOGY CORP ]
