APPENDIX
Appendix 1. Memory assigment in SFR area
Access characteristics
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid. It is impossible to read the bit state.
RW
RO
WO
: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.
State immediately after reset
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after
reset.
0
1
?
: Always “0” at reading.
0
1
?
0
: Always “1” at reading.
: Always undefined at reading.
: “0” immediately after reset. Fix this bit to “0.”
Register name
Address
Access characteristics
State immediately after reset
b7
b7
b0
b0
A0 16
A1 16
A2 16
A3 16
A4 16
A5 16
A6 16
A7 16
A8 16
A9 16
AA16
AB16
AC16
AD16
AE16
AF 16
B0 16
B1 16
B2 16
B3 16
B4 16
B5 16
B6 16
B7 16
B8 16
B9 16
BA16
BB16
BC16
BD16
BE16
BF 16
(Note 17)
?
?
?
(Note 17)
(Note 17)
?
?
?
Waveform output mode register
Dead-time timer
RW
WO
RW
RW
0016
?
0016
Three-phase output data register 0
Three-phase output data register 1
Position-data-retain function control register
0016
0
0
0
0
0
0
0
0
RW RO RO RO
RW RW RW RW
RW RW RW RW
?
?
?
Serial I/O pin control register
0
0
?
0
?
0
?
0
0
0
0
Port P2 pin function control register
0
RW
?
?
?
?
?
?
?
?
?
?
?
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
RW RW RW RW (Note 18) RW RW
?
?
1
1
1
1
Clock control register 0
0
0
0
0
(Note 17)
?
?
?
(Note 17)
(Note 17)
Notes 17 : Do not write to this register.
18 : After reset, these bits are allowed to be changed only once.
7906 Group User’s Manual Rev.2.0
20-7
RENESAS [ RENESAS TECHNOLOGY CORP ]
