APPENDIX
Appendix 1. Memory assigment in SFR area
Access characteristics
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid. It is impossible to read the bit state.
RW
RO
WO
: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.
State immediately after reset
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after
reset.
0
1
?
: Always “0” at reading.
0
1
?
0
: Always “1” at reading.
: Always undefined at reading.
: “0” immediately after reset. Fix this bit to “0.”
Register name
Address
Access characteristics
State immediately after reset
b7
b0
b7
b0
E0 16
E1 16
E2 16
E3 16
E4 16
E5 16
E6 16
E7 16
E8 16
E9 16
EA16
EB16
EC16
ED16
EE16
EF16
F016
F116
F216
F316
F416
F516
F616
F716
F816
(Note 21)
(Note 21)
(Note 21)
(Note 21)
(Note 21)
?
?
?
?
?
?
?
(Note 21)
(Note 21)
(Note 21)
(Note 21)
(Note 21)
(Note 21)
?
?
?
?
?
?
?
?
?
?
?
?
?
?
(Note 21)
(Note 21)
(Note 21)
(Note 21)
(Note 21)
(Note 21)
(Note 21)
Timer A5 interrupt control register
Timer A6 interrupt control register
Timer A7 interrupt control register
Timer A8 interrupt control register
RW
RW
RW
RW
RW
?
?
?
?
?
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F916 Timer A9 interrupt control register
FA16
FB16
FC16
?
?
?
FD16
FE16
FF16
INT
5
interrupt control register
interrupt control register
interrupt control register
0
0
0
0
0
0
RW
RW
RW
?
INT
INT
6
7
0
0
0
0
0
0
0
0
0
0
0
0
?
?
Notes 21 : Do not write to this register.
7906 Group User’s Manual Rev.2.0
20-9
RENESAS [ RENESAS TECHNOLOGY CORP ]
