DEBUG FUNCTION
17.3 Address matching detection mode
ꢀ Address matching detection 0 or 1 selected
Address matching
detection interrupt routine
Main routine
The interrupt disable flag (I)
is cleared to “0” (Note 1)
TOP_BUG
Defective
or
Modified
or
Former program
Updated program
TOP_RTN
The contents of PG and PC
saved onto the stack area
(address TOP_BUG) are
rewritten to address
TOP_RTN (Note 2).
STAB A, LG : 0h (Note 3)
RTI
TOP_BUG : The start address of defective or former program.
→This address is to be set in the address compare register 0 or 1, in advance.
TOP_RTN : The address next to the defective or former program.
Notes 1: When an address matching detection interrupt request has been accepted, the interrupt
disable flag (I) is set to “1.” If another interrupt requests is required to be accepted under
the same conditions as those of the defective or former program, be sure to clear the
interrupt disable flag (I) to “0” at the start of an address matching detection interrupt
routine.
2: Each status of PG, PC, and PS immediately before acceptance of an address matching
detection interrupt request is saved onto the stack area. (The contents of PG, PC, and
PS are saved onto the stack area in this order.) Refer to section “6.7 Sequence from
acceptance of interrupt request until execution of interrupt routine.”
3: Make sure that this instruction is executed in the absolute long addressing mode. The
above is just an example. In an actual programming, be sure to refer to the format of the
assembler description to be used.
Fig. 17.3.2 Example of ROM correct processing using address matching detection mode (1)
7906 Group User’s Manual Rev.2.0
17-8
RENESAS [ RENESAS TECHNOLOGY CORP ]
