STOP AND WAIT MODES
15.2 Block description
(2) External clock input select bit (bit 1)
When this bit = “0,” the oscillation driver circuit between pins XIN and XOUT is operationg. At the stop
mode termination owing to an interrupt occurrence, the watchdog timer is used.
Setting this bit to “1” stops the oscillation driver circuit between pins XIN and XOUT and keeps the output
level at pin XOUT being “H.” (Refer to section “16.3 Stop of oscillation circuit.”) At the stop mode
termination owing to an interrupt occurrence, the watchdog timer is not used if the system clock select
bit (bit 5 at address BC16) = “0,” where as the watchdog timer is used if the system clock select bit
= “1.”
To rewrite this bit, write “0” or “1” just after writing of “5516” to address 6216. (See Figure 15.2.3.)
Note that if an interrupt occurs between writing of “5516” and next writing of “0” or “1,” latter writing
may be ignored. When there is a possibility that an interrupt occurs at the above timing, be sure to
read this bit’s contents after writing of “0” or “1,” and verify whether “0” or “1” has correctly been
written or not.
In addition, even when the watchdog timer is disabled by the particular function select register 2
(address 6416), the watchdog timer can be active only at the stop mode termination if this bit = “0.”
(Refer to section “15.3 Stop mode.”)
Writing of “5516
”
b7
b0
Particular function select register 0 (Address 6216
)
0
1
0
1
0
1
0
1
Note: Bits’ state does not change only
by writing of “5516.”
Next
instruction
Writing to bits 0, 1
b7
b0
0
0
0
0
0
0
Particular function select register 0 (Address 6216
)
STP instruction invalidity select bit
0 : STP instruction is valid.
1 : STP instruction is invalid.
External clock input select bit
0 : Oscillation circuit is active. (Oscillator is connected.)
Watchdog timer is used at stop mode termination.
1 : Oscillation circuit is inactive. (External clock is input.)
When the system clock select bit (bit 5 at address BC16) = “0,”
watchdog timer is not used at stop mode termination.
When the system clock select bit = “1,”
watchdog timer is used at stop mode termination.
Setting completed
Fig. 15.2.3 Writing procedure for particular function select register 0
7906 Group User’s Manual Rev.2.0
15-5
RENESAS [ RENESAS TECHNOLOGY CORP ]
