WATCHDOG TIMER
14.2 Operation description
14.2.2 Stop period
The watchdog timer stops its operation in any of the following cases:
ꢀ During Wait mode (Refer to section “15.4 Wait mode.”)
ꢀ During Stop mode (Refer to section “15.3 Stop mode.”)
When state ꢀ has been terminated, the watchdog timer restarts counting from the state immediately before
it stops its operation. For the watchdog timer’s operation at termination of state ꢀ, refer to section “14.2.3
Operation in stop mode.”
14.2.3 Operations in stop mode
When the STP instruction has been executed, a value of “FFF16” is set to the watchdog timer, and the
watchdog timer stops its operation in the stop mode. Immediately after the stop mode termination, the
watchdog timer operates as follows.
(1) When stop mode is terminated by hardware reset
Supply of φCPU and φBIU starts immediately after the stop mode termination, and the microcomputer
performs “operation after reset.” (Refer to “CHAPTER 3. RESET.”) The watchdog timer frequency
select bit becomes “0,” and the watchdog timer starts counting of Wf512 from “FFF16.”
(2) When stop mode is terminated by interrupt occurrence (with watchdog timer used) (Note)
Immediately after the stop mode termination, the watchdog timer starts counting the count source
selected by the watchdog timer clock source select bits at STP termination (bits 6, 7 at address 6116),
starting from “FFF16.” It is independent of the watchdog timer frequency select bit (bit 0 at address
6116). When the most significant bit of the watchdog timer becomes “0,” supply of φCPU and φBIU starts.
(At this time, no watchdog timer interrupt request occurs.)
When supply of φCPU and φBIU starts, the routine of the interrupt which the microcomputer used to
terminate the stop mode is executed. The watchdog timer restarts counting of the count source (Wf32
or Wf512), which was counted immediately before execution of the STP instruction, starting from “FFF16.”
Note: For the setting of the usage of the watchdog timer, refer to section “15.3 Stop mode.”
(3) When stop mode is terminated by interrupt occurrence (with watchdog timer not used) (Note)
Supply of φCPU and φBIU starts immediately after the stop mode termination, and the routine of the
interrupt which the microcomputer used to terminate the stop mode is executed. The watchdog timer
restarts counting of the count source (Wf32 or Wf512), which was counted immediately before execution
of the STP instruction, starting from “FFF16.”
Note: For the setting of the usage of the watchdog timer, refer to section “15.3 Stop mode.”
7906 Group User’s Manual Rev.2.0
14-7
RENESAS [ RENESAS TECHNOLOGY CORP ]
