SERIAL I/O
[Precautions for clock synchronous serial I/O mode]
[Precautions for clock synchronous serial I/O mode]
1. A transfer clock is generated by operation of the transmit control circuit. Accordingly, even when performing
only reception, the transmit operation (in other words, setting for transmission) must be performed. In this
case, be sure to set as follows. Additionally, in this case, dummy data is output from the TxD
external:
i
pin to the
• When performing reception, be sure to enable the reception after dummy data is set to the low-order
byte of the UARTi transmit buffer register. Also, be sure to set dummy data at each 1-byte data
reception.
• At reception, be sure to set the receive enable bit and transmit enable bit to “1” simultaneously.
When performing only reception, if any of the TxD
0
/P1
3
and TxD
1
/P1 switch bits (bits 2 and 3 at address
7
AC16) is set to “1,” the corresponding TxD pin can be used as a programmable I/O port pin.
i
2. When an external clock is selected, with the input level at the CLK pin = “H” (the CLK polarity select bit
i
= “0”) or “L” (the CLK polarity select bit = “1”), be sure to satisfy all of the following three conditions:
<At transmission>
ꢀ Transmit data is written to the UARTi transmit buffer register.
ꢀ The transmit enable bit is set to “1.”
ꢀ “L” level is input to the CTS pin (when the CTS function selected).
i
<At reception>
ꢀ Dummy data is written to the UARTi transmit buffer register.
ꢀ The receive enable bit is set to “1.”
ꢀ The transmit enable bit is set to “1.”
3. While the CTS
i
/RTS
i
separation is selected, the CLK
i
pin cannot be used. Accordingly, in the clock
synchronous serial I/O mode, the CTS
i
/RTS separation cannot be selected.
i
4. Writing to the UARTi baud rate register (BRGi) must be performed while transmission/reception halts.
5. When an internal clock is selected, do not use the RTS function because the RTS output is undefined.
6. When performing transmission, be sure to clear any of the TxD
2 and 3 at address AC16).
0
/P1
3
and TxD
1
/P1
7
switch bits to “0” (bits
7906 Group User’s Manual Rev.2.0
11-35