TIMER A
7.6 Pulse width modulation (PWM) mode
7.6.1 Setting for PWM mode
Figures 7.6.2 and 7.6.3 show an initial setting example for registers relevant to the PWM mode.
Note that when using interrupts, set up to enable the interrupts. For details, refer to “CHAPTER 6.
INTERRUPTS.”
Selecting PWM mode and each function
b7
b0
Timer Aj mode register (j = 0 to 2, 4, 9)
1
1
1
(Addresses 5616 to 5816, 5A16, DA16
)
Selection of PWM mode
Trigger select bits
b4 b3
0 0 :
0 1 :
Writing “1” to count start bit: Internal trigger
1 0 : Falling edge of TAjIN pin’s input signal: External trigger
1 1 : Rising edge of TAjIN pin’s input signal: External trigger
16/8-bit PWM mode select bit
0 : Operates as 16-bit pulse width modulator
1 : Operates as 8-bit pulse width modulator
Count source select bits
See Table 7.2.3.
Setting PWM pulse’s period and “H” level width
➀➀When operating as 16-bit pulse width modulator
Timer A0 register (Addresses 4716, 4616
Timer A1 register (Addresses 4916, 4816
Timer A2 register (Addresses 4B16, 4A16
Timer A4 register (Addresses 4F16, 4E16
Timer A9 register (Addresses CF16, CE16
)
)
)
(b15)
b7
(b8)
b0 b7
b0
)
)
Can be set to “000016” to “FFFE16” (n)
➀➀When operating as 8-bit pulse width modulator
Timer A0 register (Addresses 4716, 4616
Timer A1 register (Addresses 4916, 4816
)
)
(b15)
b7
(b8)
b0 b7
b0
Timer A2 register (Addresses 4B16, 4A16
Timer A4 register (Addresses 4F16, 4E16
Timer A9 register (Addresses CF16, CE16
)
)
)
Can be set to “0016” to “FF16” (m)
Can be set to “0016” to “FE16” (n)
Note. When operating as 8-bit pulse width modulator
(m+1) (28– 1)
Note. When operating as 16-bit pulse width modulator
216– 1
(fi : Frequency of
(fi : Frequency of count source)
Period =
Period =
fi
count source)
fi
n(m+1)
n
“H” level width =
“H” level width =
fi
fi
However, if n = “0016”, the pulse width modulator
does not operate and the TAjOUT pin outputs “L”
level. At this time, no timer Aj interrupt request
occurs.
However, if n = “000016”, the pulse width modulator does
not operate and the TAjOUT pin outputs “L” level. At this
time, no timer Aj interrupt request occurs.
Continued to Figure 7.6.3
on the next page
Fig. 7.6.2 Initial setting example for registers related to PWM mode (1)
7906 Group User’s Manual Rev.2.0
7-40
RENESAS [ RENESAS TECHNOLOGY CORP ]
