TIMER A
[Precautions for one-shot pulse mode]
[Precautions for one-shot pulse mode]
1. Each of timers A3, A5 to A8 is not equipped with the one-shot pulse mode.
2. If the count start bit is cleared to “0” during counting, the counter becomes as follows:
•The counter stops counting, and the reload register’s contents are reloaded into the counter.
•The TAjOUT pin’s output level becomes “L.”
•The timer Aj interrupt request bit is set to “1.”
3. A one-shot pulse is output synchronously with an internally generated count source. Accordingly, when
selecting an external trigger, there will be a delay equivalent to one cycle of the count source at
maximum, in a period from when a trigger is input to the TAjIN pin until a one-shot pulse is output.
Trigger input
TAjIN pin’s
input signal
Count
source
One-shot pulse
output from
Starts outputting of one-shot pulse
TAjOUT pin
Note: The above applies when an external trigger (falling edge of TAjIN pin’s input signal) is selected.
Fig. 7.5.6 Output delay in one-shot pulse output
4. When the timer’s operating mode has been set by one of the following procedures, the timer Aj interrupt
request bit will be set to “1.”
➀When the one-shot pulse mode is selected after reset
➀When the operating mode is switched from the timer mode to the one-shot pulse mode
➀When the operating mode is switched from the event counter mode to the one-shot pulse mode
Accordingly, when using a timer Aj interrupt (interrupt request bit), be sure to clear the timer Aj interrupt
request bit to “0” after the above setting.
7906 Group User’s Manual Rev.2.0
7-37
RENESAS [ RENESAS TECHNOLOGY CORP ]
