Table of contents
9.3 Setting of pulse output port mode ................................................................................. 9-14
9.4 Pulse output port mode operation .................................................................................. 9-19
9.4.1 Pulse output trigger ..................................................................................................... 9-19
9.4.2 Operation at internal trigger ....................................................................................... 9-20
9.4.3 Operation at external trigger ...................................................................................... 9-23
[Precautions for pulse output mode] .................................................................................... 9-24
CHAPTER 10. THERR-PHASE WAVEFORM MODE
10.1 Overview .............................................................................................................................. 10-2
10.2 Block description .............................................................................................................. 10-4
10.2.1 Waveform output mode register............................................................................... 10-5
10.2.2 Dead-time timer register ........................................................................................... 10-7
10.2.3 Three-phase output data register 0......................................................................... 10-9
10.2.4 Three-phase output data register 1.......................................................................10-10
10.2.5 Position-data-retain function control register ........................................................10-12
10.2.6 Port P5 direction register ........................................................................................... 10-13
10.2.7 Timers A0 through A2 .............................................................................................10-13
10.2.8 Timer A3....................................................................................................................10-14
10.2.9 Output polarity set toggle flip-flop .........................................................................10-15
10.2.10 Three-phase waveform mode I/O pins................................................................10-16
10.2.11 Pin P6OUTCUT (three-phase waveform-output-forcibly-cutoff signal input pin) ..10-16
10.3 Three-phase mode 0 .......................................................................................................10-17
10.3.1 Setting for three-phase mode 0 .............................................................................10-17
10.3.2 Operation in three-phase wave mode 0 ...............................................................10-21
10.4 Three-phase mode 1 .......................................................................................................10-26
10.4.1 Setting for three-phase mode 1 .............................................................................10-26
10.4.2 Operation in three-phase wave mode 1 ...............................................................10-30
10.5 Three-phase waveform output fixation ......................................................................10-33
10.6 Position-data-retain function ........................................................................................10-35
10.6.1 Operation of position-data-retain function.............................................................10-35
[Precautions for three-phase waveform mode] .................................................................10-36
CHAPTER 11. SERIAL I/O
11.1 Overview .............................................................................................................................. 11-2
11.2 Block description .............................................................................................................. 11-3
11.2.1 UARTi transmit/receive mode register .................................................................... 11-4
11.2.2 UARTi transmit/receive control register 0............................................................... 11-6
11.2.3 UARTi transmit/receive control register 1............................................................... 11-8
11.2.4 UARTi transmit register and UARTi transmit buffer register .............................11-10
11.2.5 UARTi receive register and UARTi receive buffer register................................11-12
11.2.6 UARTi baud rate register (BRGi)...........................................................................11-14
11.2.7 UARTi transmit interrupt control and UARTi receive interrupt control registers . 11-15
11.2.8 Serial I/O pin control register .................................................................................11-17
11.2.9 Port P8 direction register ........................................................................................11-18
11.2.10 CTS/RTS function ..................................................................................................11-19
11.3 Clock synchronous serial I/O mode ...........................................................................11-20
11.3.1 Transfer clock (Synchronizing clock).....................................................................11-20
11.3.2 Transfer data format ................................................................................................11-22
11.3.3 Method of transmission ...........................................................................................11-23
7906 Group User’s Manual Rev.2.0
iv
RENESAS [ RENESAS TECHNOLOGY CORP ]
