RESET
3.3 State of internal area
Address
Register name
Access characteristics
State immediately after reset
b7
b7
b0
b0
(Note 19)
?
?
E016
E116
E216
E316
E416
E516
E616
E716
E816
E916
EA16
EB16
EC16
ED16
EE16
EF16
F016
A-D register 8
A-D register 9
A-D register 10
A-D register 11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
?
?
?
?
0
0
0
0
(Note 19)
(Note 19)
(Note 19)
(Note 19)
(Note 19)
(Note 19)
?
?
(Note 19)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
?
?
?
?
?
?
?
?
?
F116
F216
F316
F416
F516
F616
F716
F816
F916
FA16
FB16
FC16
FD16
FE16
FF16
0
0
0
0
0
0
0
0
UART2 transmit interrupt control register
UART2 receive interrupt control register
?
?
RW
RW
?
?
Timer A5 interrupt control register
Timer A6 interrupt control register
Timer A7 interrupt control register
Timer A8 interrupt control register
Timer A9 interrupt control register
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
?
?
?
?
?
RW
RW
RW
RW
RW
(Note 20)
(Note 20)
(Note 20)
?
?
?
INT
INT
INT
5
6
7
interrupt control register
interrupt control register
interrupt control register
0
0
0
0
0
0
RW
RW
RW
?
0
0
0
0
0
0
0
0
0
0
0
0
?
?
Notes 19: The access characteristics at addresses E016 to E716 vary according to the contents of the comparator function
select register 1 (address DD16). (Refer to “CHAPTER 12. A-D CONVERTER.”)
20: Do not write to this register.
➀ Internal RAM area
At hardware reset ................................................................................. Retains the state immediately before reset (Note 21).
At software reset.................................................................................................... Retains the state immediately before reset.
At termination of the stop or wait mode
(when hardware reset is used for the termination.)....................................Retains the state immediately before the STP or
WIT instruction is executed.
At power-on reset..................................................................................................................................................... Undefined.
Notes 21 : When a reset operation starts while writing to the internal RAM area is in process, the microcomputer will be
reset before the completion of writing. Accordingly, the contents of the area where the writing was in process
will become undefined.
Fig. 3.3.9 State of SFR and internal RAM areas immediately after reset (8)
7905 Group User’s Manual Rev.1.0
3-14
RENESAS [ RENESAS TECHNOLOGY CORP ]
