RESET
3.3 State of internal area
Address
Register name
Access characteristics
State immediately after reset
b7
b0
b7
b0
C016
C116
C216
C316
C416
C516
C616
C716
C816
C916
CA16
CB16
CC16
CD16
CE16
CF16
D016
D116
D216
D316
D416
D516
D616
D716
D816
D916
DA16
DB16
?
?
?
?
RW
(Note 18)
WO
Up-down register 1
0
0
0
0
0
0
0
0
?
?
?
?
?
?
?
Timer A5 register
Timer A6 register
Timer A7 register
Timer A8 register
Timer A9 register
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
(Note 18)
?
?
?
?
?
?
?
?
?
?
(Note 18)
WO
Timer A0
1
register
WO
WO
Timer A1
1
1
register
register
WO
WO
Timer A2
WO
RW
RW
RW
RW
RW
RW
0016
Timer A5 mode register
Timer A6 mode register
Timer A7 mode register
0016
0016
0016
0016
Timer A8 mode register
Timer A9 mode register
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A-D control register 2
Comparator function select register 0
RW
RW
RW
RW
DC16
DD16
DE16
DF16
Comparator function select register 1
0
0
0
Comparator result register 0
Comparator result register 1
0
Note 18: The access characteristics at addresses C616 to CF16 vary according to the timer A’s operating mode.
(Refer to “CHAPTER 7. TIMER A.”)
Fig. 3.3.8 State of SFR and internal RAM areas immediately after reset (7)
7905 Group User’s Manual Rev.1.0
3-13