RTL8208B-LF/RTL8208BF-LF
Datasheet
7. Function Description
7.1. General
7.1.1. SMI (Serial Management Interface)
SMI (Serial Management Interface) is also known as MII Management Interface and consists of two
signals, MDIO and MDC, which allow the MAC controller to control and monitor the state of the PHY.
MDC is a clock input for PHY to latch MDIO on its rising edge. The clock can run from DC to 2.5MHz.
MDIO is a bi-directional connection used to write data to, or read data from PHY. The PHY address base
is set by pins PHY_ADDR[4:3], and the eight port addresses of the RTL8208B(F)-LF are internally 000,
001, 010, 011, 100, 101, 110, and 111.
Table 21. SMI Read/Write Cycles
Preamble
(32 bits)
1……..1
1……..1
Start
(2 bits)
01
OP Code
(2 bits)
10
PHYAD
(5 bits)
AAAAA
AAAAA
REGAD
(5 bits)
RRRRR
RRRRR
Turnaround
Data
Idle
(2 bits)
Z0
(16 bits)
D…….D
D…….D
Z*
Z*
Read
01
01
10
Write
Note1: *Z: high-impedance. During idle time, MDIO state is determined by an external 1.5KΩ pull-up resistor.
Note2: The RTL8208B(F)-LF supports Preamble Suppression, which allows the MAC to issue Read/Write Cycles without
preamble bits (but needs at least one Idle for every cycle). However, for the first MII management cycle after
power-on reset, a 32-bit preamble is needed. To guarantee the first successful SMI transaction after power-on
reset, the MAC should be delayed at least 700µs to issue the first SMI Read/Write Cycle relative to the rising edge
of reset.
7.1.2. Port Pair-Loop Back Mode (PP-LPBK) (RTL8208BF-LF Only)
Port Pair-Loop Back Mode (PP-LPBK) mode is enabled by pulling the pin high on reset. When in
PP-LPBK mode, the ports of the RTL8208BF-LF are configured as four pairs, port0 & port1, port2 &
port3, port4 & port5, and port6 & port7. Each pair is set as RMII interface loopback, acting as a signal
regeneration /transformation repeater, so a switch controller is not necessary.
In PP-LPBK mode, TP port and FX port selection is different from that in normal mode. The TP and FX
port selection configuration is as follows:
In Table 22, ‘U’ means UTP port, ‘F’ means Fiber port.
Table 22. Port Pair-Loop Back Mode (PP-LPBK) (RTL8208BF-LF Only)
PP-LPBK Mode
SEL_TXFX[1:0]
(Pin 99, 107)
Port0, Port1
Port2, Port3
Port4, Port5
Port6, Port7
(Pin 105)
0
(Normal Mode)
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
U U
U U
U U
F F
U U
U U
U F
F F
U U
U U
U U
F F
U U
U U
U F
F F
U U
U U
U U
F F
U U
U F
U F
F F
U U
U F
F F
F F
U U
U F
U F
F F
1
(PP-LPBK)
Single-Chip Octal 10/100-TX/FX PHY Transceiver
26
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
