RTL8201E(L)
Datasheet
Table of Contents
1.
2.
3.
4.
5.
GENERAL DESCRIPTION..............................................................................................................................................1
FEATURES.........................................................................................................................................................................2
APPLICATIONS................................................................................................................................................................2
BLOCK DIAGRAM...........................................................................................................................................................3
PIN ASSIGNMENTS .........................................................................................................................................................4
5.1.
RTL8201EL LQFP-48 PIN ASSIGNMENTS...................................................................................................................4
GREEN PACKAGE AND VERSION IDENTIFICATION ........................................................................................................4
RTL8201E QFN-32 PIN ASSIGNMENTS.......................................................................................................................5
GREEN PACKAGE AND VERSION IDENTIFICATION ........................................................................................................5
5.2.
5.3.
5.4.
6.
PIN DESCRIPTIONS.........................................................................................................................................................6
6.1.
MII INTERFACE............................................................................................................................................................6
RMII INTERFACE (RTL8201E(L)-VB ONLY)..............................................................................................................8
SNI (SERIAL NETWORK INTERFACE) 10MBPS ONLY ...................................................................................................8
CLOCK INTERFACE.......................................................................................................................................................8
10MBPS/100MBPS NETWORK INTERFACE ...................................................................................................................9
DEVICE CONFIGURATION INTERFACE ..........................................................................................................................9
LED INTERFACE/PHY ADDRESS CONFIGURATION ....................................................................................................10
POWER AND GROUND PINS ........................................................................................................................................10
RESET AND OTHER PINS.............................................................................................................................................10
NC (NOT CONNECTED) PINS......................................................................................................................................10
6.2.
6.3.
6.4.
6.5.
6.6.
6.7.
6.8.
6.9.
6.10.
7.
REGISTER DESCRIPTIONS.........................................................................................................................................11
7.1.
REGISTER 0 BASIC MODE CONTROL REGISTER..........................................................................................................11
REGISTER 1 BASIC MODE STATUS REGISTER.............................................................................................................12
REGISTER 2 PHY IDENTIFIER REGISTER 1..................................................................................................................12
REGISTER 3 PHY IDENTIFIER REGISTER 2..................................................................................................................13
REGISTER 4 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) ...................................................................13
REGISTER 5 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR)....................................................14
REGISTER 6 AUTO-NEGOTIATION EXPANSION REGISTER (ANER) ............................................................................15
REGISTER 16 NWAY SETUP REGISTER (NSR)............................................................................................................15
REGISTER 17 LOOPBACK, BYPASS, RECEIVER ERROR MASK REGISTER (LBREMR).................................................15
REGISTER 18 RX_ER COUNTER (REC) .....................................................................................................................16
REGISTER 19 SNR DISPLAY REGISTER ......................................................................................................................16
REGISTER 25 TEST REGISTER.....................................................................................................................................16
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
7.10.
7.11.
7.12.
8.
FUNCTIONAL DESCRIPTION.....................................................................................................................................17
8.1.
MII AND MANAGEMENT INTERFACE..........................................................................................................................18
8.1.1. Data Transition ....................................................................................................................................................18
8.1.2. Serial Management...............................................................................................................................................19
8.1.3. Interrupt (RTL8201EL-VB Only)..........................................................................................................................20
8.2.
AUTO-NEGOTIATION AND PARALLEL DETECTION .....................................................................................................20
8.2.1. Setting the Medium Type and Interface Mode to MAC.........................................................................................20
8.3.
FLOW CONTROL SUPPORT..........................................................................................................................................20
HARDWARE CONFIGURATION AND AUTO-NEGOTIATION...........................................................................................21
LED AND PHY ADDRESS CONFIGURATION ...............................................................................................................21
SERIAL NETWORK INTERFACE ...................................................................................................................................22
POWER DOWN, LINK DOWN, AND POWER SAVING MODES........................................................................................22
MEDIA INTERFACE.....................................................................................................................................................23
8.4.
8.5.
8.6.
8.7.
8.8.
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
iii
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
