欢迎访问ic37.com |
会员登录 免费注册
发布采购

VRS51L1050-25-PG-ISPV3 参数 Datasheet PDF下载

VRS51L1050-25-PG-ISPV3图片预览
型号: VRS51L1050-25-PG-ISPV3
PDF下载: 下载PDF文件 查看货源
内容描述: 的Versa 8051 MCU的3.3V与IAP / ISP功能的Flash 64KB [Versa 8051 3.3V MCU with 64KB of IAP/ISP Flash]
分类和应用: 光电二极管微控制器
文件页数/大小: 49 页 / 505 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
 浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第2页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第3页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第4页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第5页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第7页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第8页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第9页浏览型号VRS51L1050-25-PG-ISPV3的Datasheet PDF文件第10页  
VRS51L1050  
When programming the ISP boot program into the  
VRS51L1050, the “lock bit” option should be activated  
in order to:  
VRS51L1050 Program Memory  
The VRS51L1050 includes 64KB of on-chip Flash  
memory that can be used as program memory or as  
general non-volatile data storage memory using the In-  
Application Programming (IAP) feature.  
o
Protect the ISP Flash memory zone from being  
inadvertently erased (this can happen when  
the Flash Erase operations are performed  
under the control of the ISP boot program),  
Prevent the VRS51L1050 Flash from being  
read back using a parallel programmer.  
o
ISP Boot Program Memory Zone  
The upper portion of the VRS51L1050 Flash memory  
can be reserved to store an ISP (In-System  
Programmable) boot loader program.  
If an erase operation is performed using a parallel  
programmer, the entire Flash memory, including the  
ISP boot program memory zone, will be erased.  
This boot program can be used to program the Flash  
memory via the serial interface (or any other method)  
with the VRS51L1050’s In-Application Programming  
feature. This allows the processor to load the program  
from an external device or system and program it into  
the Flash memory (see the VRS51L1050 IAP feature  
section).  
VRS51L1050 ISPV3 Firmware Boot Program  
An ISP boot loader program is available for the  
VRS51L1050 (ISPVx Firmware, x = revision, see  
Ramtron web site for latest revision). The ISPVx  
firmware enables In-System-Programming of the  
VRS51L1050 on the final application PCB using the  
device’s UART interface. See the following figure for a  
hardware configuration example (other configurations  
are also possible).  
The size of the memory block reserved for the ISP  
boot loader program (when activated) is adjustable  
from 512 bytes up to 4KB in increments of 512 bytes.  
FIGURE3: VRS51L1050-ISP PROGRAM SIZE VS ISP CONFIG. VALUE  
FIGURE 4: VRS51L1050 INTERFACE FOR IN-SYSTEM PROGRAMMING  
FFFFh  
FE00h  
FC00h  
FA00h  
VRS51L1050  
(with ISPV3  
Firmware)  
F800h  
ISP Program Size =  
ISP Config value x 512Bytes  
TXD  
F600h  
F400h  
F200h  
F000h  
RXD  
To PC  
Creset  
PNP  
150k  
RES  
0000h  
Rreset  
Programming the ISP Boot Program  
The ISP boot program must be programmed into the  
device using  
Ramtron’s VERSAMCU-PPR or  
programmer that supports the VRS51L1050). The  
Flash memory reserved for the ISP program is defined  
by the parallel programmer software at the moment the  
device is programmed.  
a
parallel programmer (such as  
commercial  
The VRS51L1050 is available with or without the  
ISPVx boot loader firmware (see ordering information  
on page 50). The ISPVx boot loader firmware can also  
be programmed into the VRS51L1050 by the user.  
Source code is included with Ramtron’s Windows™-  
based Versa Ware ISP application software, which  
allows communication with the ISPVx firmware.  
a
Visit the Ramtron web site to download the Versa  
Ware ISP software. For more information on the ISPVx  
firmware, consult the “Versa Ware ISP - VRS51L1050  
ISPVx User Guide.pdf”, also available on the Ramtron  
web site.  
______________________________________________________________________________________________  
www.ramtron.com page 6 of 49  
 复制成功!