Preliminary Data Sheet
Capacitance (T
A
= 0°C to 70°C)
°
°
Symbol
C
IN
C
I/O
Parameter
Input Capacitance
Input/Output Capacitance
Min
2.5
3.5
Typical
-
-
72Mbit Pipelined BSRAM
w/ NoBL Architecture
2Mx36
Max
4
6
Units
pF
pF
Notes
AC Test Load
V
H
--
Z
0
= 50Ω
ALL
INPUTS
R
L
= 50Ω
-- V
L
OUTPUT
90%
10%
t
L
V
TT
For V
DD
= 3.3V, AC timing tests use V
L
= 0V and V
H
= 3.0V. For V
DDQ
= 2.5V AC timing tests use V
L
= 0V and V
H
= 2.5V.
In both cases, input transit time t
T
must be
≤
2 ns. Input timings are referenced to (V
H
-V
L
) / 2. Output timings are
referenced to V
TT
(for V
DDQ
= 3.3V, V
TT
= 1.5V and for V
DDQ
= 2.5V, V
TT
= 1.25V).
DC Equivalent Load
R1
V
DDQ
OUTPUT
C
L
= 5 pF
R2
For VDDQ = 2.5V
R1 = 422Ω
R2 = 390Ω
For VDDQ = 3.3V
R1 = 317Ω
R2 = 351Ω
Including
Jig and
Scope
Package Thermal Characteristics
Symbol
θ
JA
θ
JC
Parameter
Thermal Resistance (Junction to Ambient)
Thermal Resistance (Junction to Case)
TQFP
25
10
PBGA
22
8
Units
°C/W
°C/W
Notes
1, 2, 3
2
Notes:
1. Tested in still air with device soldered to a 4.25 x 1.125 inch, 4-layer printed circuit board.
2. Tested initially and after any design or process changes that may affect these parameters.
3. Value accounts for thermal conduction through device leads or solder balls.
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095;
http://www.edram.com
Copyright 2001 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
Revision 1.0
Page 9 of 30
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
