FM31T372/374/376/378-G
AC Test Conditions
Equivalent AC Load Circuit
5.5V
Input Pulse Levels
Input rise and fall times
Input and output timing levels
0.1 VDD to 0.9 VDD
10 ns
0.5 VDD
1700
Diagram Notes
Output
All start and stop timing parameters apply to both read and write
cycles. Clock specifications are identical for read and write cycles.
Write timing parameters apply to slave address, word address, and
write data bits. Functional relationships are illustrated in the relevant
data sheet sections. These diagrams illustrate the timing parameters
only.
100 pF
Read Bus Timing
tHIGH
tR
tSP
tF
t SP
tLOW
`
SCL
1/fSCL
tSU:STA
tHD:DAT
tSU:DAT
tBUF
SDA
tDH
tAA
Stop Start
Acknowledge
Start
Write Bus Timing
tHD:DAT
SCL
tSU:DAT
tAA
tHD:STA
tSU:STO
SDA
Stop Start
Acknowledge
Start
Rev. 1.1
Apr. 2011
Page 24 of 26
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
