FM31T372/374/376/378-G
DC Operating Conditions, continued (TA = -40 C to + 85 C, VDD = 2.7V to 5.5V unless otherwise specified)
Symbol Parameter
Min
Typ
Max
Units Notes
VIH
Input High Voltage
All inputs except those listed below
PFI (comparator input)
CNT1-2 battery backed (VDD < 2.4V)
CNT1-2 VDD > 2.4V
0.7 VDD
VDD + 0.3
3.75
VBAK + 0.3
VDD + 0.3
0.4
V
V
V
V
V
-
VBAK – 0.5
0.7 VDD
-
VOL
Output Low Voltage (IOL = 3 mA),
FOUT, /INT, /RST
VOH
RRST
RIN
Output High Voltage (IOH = -2 mA)
Pull-up Resistance for /RST Inactive
Input Resistance (pulldown)
A1-A0 for VIN = VIL max
A1-A0 for VIN = VIH min
2.4
50
-
V
K
400
20
1
K
M
V
VPFI
VHYS
Power Fail Input Reference Voltage
Power Fail Input (PFI) Hysteresis (Rising)
1.175
1.20
-
1.225
100
mV
Notes
1. SCL toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V.
2. All inputs at VSS or VDD, static. Stop command issued.
3. VIN or VOUT = VSS to VDD. Does not apply to A0, A1, PFI, or /RST pins.
4. VBAK = 3.0V, VDD < 2.4V, oscillator running, CNT1-2 at Vss or VBAK
.
5. /RST is asserted low when VDD < VTP.
6. The minimum VDD to guarantee the level of /RST remains a valid VOL level.
7. Full complete operation. Supervisory circuits, RTC, etc operate to lower voltages as specified.
8. Includes /RST input detection of external reset condition to trigger driving of /RST signal by FM31T37x.
9. The VBAK trickle charger automatically regulates the maximum voltage on this pin for capacitor backup applications.
10. VBAK will source current when trickle charge is enabled (VBC bit=1), VDD > VBAK, and VBAK < VBAK max.
AC Parameters (TA = -40 C to + 85 C, VDD = 2.7V to 5.5V, CL = 100 pF unless otherwise specified)
Symbol Parameter
Min Max Min Max Min Max Units Notes
fSCL
tLOW
tHIGH
tAA
SCL Clock Frequency
Clock Low Period
Clock High Period
SCL Low to SDA Data Out Valid
0
4.7
4.0
100
0
1.3
0.6
400
0
0.6
0.4
1000
kHz
s
s
3
0.9
0.55
s
tBUF
tHD:STA
tSU:STA
Bus Free Before New Transmission
Start Condition Hold Time
Start Condition Setup for Repeated
Start
4.7
4.0
4.7
1.3
0.6
0.6
0.5
0.25
0.25
s
s
s
tHD:DAT
tSU:DAT
tR
tF
tSU:STO
tDH
Data In Hold Time
Data In Setup Time
Input Rise Time
Input Fall Time
Stop Condition Setup Time
Data Output Hold (from SCL @ VIL)
Noise Suppression Time Constant
on SCL, SDA
0
250
0
100
0
100
ns
ns
ns
ns
s
ns
ns
1000
300
300
300
300
100
1
1
4.0
0
0.6
0
0.25
0
tSP
50
50
50
All SCL specifications as well as start and stop conditions apply to both read and write operations.
RTC Frequency Characteristics
Symbol Parameter
Min
-
Typ
32.768
Max
-
Units
kHz
FOUT
FOUT Clock Frequency
Frequency Stability
vs. Temperature
±3
±5
ppm
ppm
0 C to +45 C
-40 C to +85 C
Δf/f
Rev. 1.1
Apr. 2011
Page 22 of 26