FM24V02 - 256Kb I2C FRAM
Sleep Mode
A low power mode called Sleep Mode is
implemented on both FM24V02 and FM24VN02
devices. The device will enter this low power state
when the Sleep command 86h is clocked-in. Sleep
Mode entry can be entered as follows:
1.
2.
3.
The master sends a START command.
The master sends Reserved Slave ID 0xF8
The master sends the I
2
C-bus slave address of
the slave device it needs to identify. The last
bit is a ‘Don’t care’ value (R/W bit). Only one
device must acknowledge this byte (the one
that has the I
2
C-bus slave address).
The master sends a Re-START command.
5.
6.
7.
The master sends Reserved Slave ID 0x86
The FM24V02 sends an ACK.
The master sends STOP to ensure the device
enters sleep mode.
Once in sleep mode, the device draws I
ZZ
current, but
the device continues to monitor the I
2
C pins. Once
the master sends a Slave Address that the FM24V02
identifies, it will “wakeup” and be ready for normal
operation within t
REC
(400
µs
max.). As an alternative
method of determining when the device is ready, the
master can send read or write commands and look for
an ACK. While the device is waking up, it will
NACK the master until it is ready.
4.
Start
By Master
S
Rsvd Slave ID (F8)
Address
Start
Address
Stop
A
Slave Address
X A
S
Rsvd Slave ID (86)
A
P
By FM24V05
Acknowledge
Figure 12. Sleep Mode Entry
Rev. 0.1
Mar. 2009
Page 8 of 15
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
