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DM2200T1-12L 参数 Datasheet PDF下载

DM2200T1-12L图片预览
型号: DM2200T1-12L
PDF下载: 下载PDF文件 查看货源
内容描述: [Cache DRAM, 4MX1, 30ns, MOS, PDSO44, 0.300 INCH, PLASTIC, TSOP2-11]
分类和应用: 动态存储器静态存储器光电二极管内存集成电路
文件页数/大小: 18 页 / 150 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
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Low Power Self-Refresh Mode Option  
/RE  
tRP2  
A
0-10  
tMSU  
tMH  
/CAL  
tMSU  
tMH  
/F, W/R,  
/WE, /S  
Dont Care or Indeterminate  
NOTES: 1. EDRAM self refreshes as long as /RE remains low. (Low Power Self-Refresh parts only).  
2. When using the Low Power Self Refresh mode the following operations must be performed:  
If row addresses are being refreshed in an evenly distributed manner over the refresh interval using /F refresh cycles, then at  
least one /F refresh cycle must be performed immediately after exit from the Low Power Self Refresh Mode. If row addresses  
are being refreshed in any other manner (/F burst or /RE distributed or burst), then all rows must be refresh immediately before  
entry to and immediately after exit from the Low Power Self Refresh.  
Part Numbering System  
DM2200J 1 - 12I  
Temperature Range  
o
No Designator = 0 to 70 C (Commercial)  
o
I = -40 to 85 C (Industrial)  
o
L = 0 to 70 C, Low Power Self-Refresh  
Access Time from Cache in Nanoseconds  
12ns  
15ns  
Power Supply Voltage  
No Designator = +5 Volts  
1 = +3.3 Volts  
Packaging System  
J = 300 Mil, Plastic SOJ  
T = 300 Mil, Plastic TSOP-II  
I/O Width  
i.e., Power to Which 2 is Raised for I/O Width (x1)  
Capacity in Bits  
i.e., Power to Which 2 is Raised for Total Capacity (4Mbit)  
Dynamic Memory  
1-17  
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