RA8806
Preliminary Version 1.0
Two Layers Character/Graphic LCD Controller
REG [B1h] Memory Read Command Register (MRCR)
Bit
Description
Default
Access
Memory data read command from the cursor position.
Note: Memory read cycle in text mode, the cursor move in same
behavior like graphic mode. B1h will perform a pre-read function. So
the cursor position will increase after the MRCR command is write.
7-0
NA
R/W
REG [C0h] Touch Panel Control Register 1 (TPCR1)
Bit
Description
Default
Access
Touch Panel Enable Bit
1 : Enable.
7
0
R/W
0 : Disable.
TP Sample Time Adjusting
000 : Wait 50µs for ADC data ready.
001 : Wait 100µs for ADC data ready.
010 : Wait 200µs for ADC data ready.
011 : Wait 400µs for ADC data ready.
100 : Wait 800µs for ADC data ready.
101 : Wait 1.6ms for ADC data ready.
110 : Wait 3.2ms for ADC data ready.
111 : Wait 6.4ms for ADC data ready.
6-4
000
R/W
Note: When touch panel detects the Touch event, to avoid the signal
instability, the sampled time is delayed to wait the signal stable. Here
time calculation is the example of system clock 10MHz.
Touch Panel Wake-up Enable:
1 : Touch panel can wake-up the Sleep mode(At the condition that
ADC is enabled).
0 : Disable the touch panel wake-up function
3
0
R/W
R/W
ADC Clock Convert Speed
0 0 0 : CLK / 4
0 0 1 : CLK / 8
0 1 0 : CLK /16
0 1 1 : CLK / 32
2-0
000
1 0 0 : CLK / 64
1 0 1 : CLK / 128
1 1 0 : CLK / 256
1 1 1 : CLK / 512
The “CLK” means system clock.
REG [C1h] Touch Panel X High Byte Data Register (TPXR)
Bit
Description
Default
Access
Touch Panel X Data Bit[9:2](Segment)
7-0
00h
R
REG [C2h] Touch Panel Y High Byte Data Register (TPYR)
Bit
Description
Default
Access
Touch Panel Y Data Bit[9:2] (Common)
7-0
00h
R
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