can be as simple as a single bar of Y within a solid perimeter of
X, or (preferably) interdigitated as shown in Figure 2-6.
solder joints, causing signal drift and resultant false detections
or transient losses of sensitivity or instability. Conformal
coatings will trap in existing amounts of moisture which will then
become highly temperature sensitive.
For better surface moisture suppression, the outer perimeter of
X should be as wide as possible, and there should be no
ground planes near the keys. The variable ‘T’ in this drawing
represents the total thickness of all materials that the keys must
penetrate.
The designer should specify ultrasonic cleaning as part of the
manufacturing process, and in cases where a high level of
humidity is anticipated, the use of conformal coatings after
cleaning to keep out moisture.
See Figure 2-6 and page 27 for examples of key layouts.
See Section 2.16 for guidance about potential FMEA problems
with small key shapes.
2.11 Power Supply Considerations
As these devices use the power supply itself as an analog
reference, the power should be very clean and come from a
separate regulator. A standard inexpensive LDO type regulator
should be used that is not also used to power other loads such
as LEDs, relays, or other high current devices. Load shifts on
the output of the LDO can cause Vdd to fluctuate enough to
cause false detection or sensitivity shifts.
2.10 PCB Layout, Construction
It is best to place the chip near the touch keys on the same
PCB so as to reduce X and Y trace lengths, thereby reducing
the chances for EMC problems. Long connection traces act as
RF antennae. The Y (receive) lines are much more susceptible
to noise pickup than the X (drive) lines.
A single ceramic 0.1uF bypass capacitor should be placed very
close to supply pins 3, 4, 5 and 6 of the IC. Pins 18, 20, and 21
do not require bypassing.
Even more importantly, all signal related discrete parts (R’s and
C’s) should be very close to the body of the chip. Wiring
between the chip and the various R’s and C’s should be as
short and direct as possible to suppress noise pickup.
Vdd can range from +3 to +5 nominal. The device enters reset
below 2.8V via an internal LVD circuit. See Section 2.13.
2.12 Startup / Calibration Times
The devices require initialization times as follows:
Ground planes and traces should NOT
be used around the keys and the Y lines
Normal cold start to ability to communicate:
from the keys. Ground areas, traces, and
4ms - Normal initialization from any type of reset
other adjacent signal conductors that act
22ms - Initialization from reset where the Setups were
previously modified.
as AC ground (such as Vdd and LED
drive lines etc) will absorb the received key signals
and reduce signal-to-noise ratio (SNR) and thus will
be counterproductive. Ground planes around keys will
also make water film effects worse.
Calibration time per key vs. burst spacings for 16 and 24
enabled keys:
Table 2-1 Basic Timings
Burst Spacing, Cal Time, ms, Cal Time, ms,
ms
16 keys
24 keys
Ground planes, if used, should be placed under or around the
QT chip itself and the associated R’s and C’s in the circuit,
under or around the power supply, and back to a connector, but
nowhere else.
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
176
231
286
342
397
452
507
563
618
673
728
228
309
390
472
553
634
715
797
878
959
1,040
See page 27 for an example of a 1-sided PCB layout.
2.10.1 LED Traces and Other Switching Signals
Digital switching signals near the Y lines will induce transients
into the acquired signals, deteriorating the SNR perfomance of
the device. Such signals should be routed away from the Y
lines, or the design should be such that these lines are not
switched during the course of signal acquisition (bursts).
To the above, add the initialization time from above (4ms or
22ms) to get the total elapsed time from reset, to the ability to
report key detections over the serial interface. Disabled keys
are subtracted from the burst sequence and thus the cal time is
shortened. The scan time should be measured on an
oscilloscope.
LED terminals which are multiplexed or switched into a floating
state and which are within or physically very near a key
structure (even if on another nearby PCB) should be bypassed
to either Vss or Vdd with at least a 10nF capacitor of any type,
to suppress capacitive coupling effects which can induce false
signal shifts. Led terminals which are constantly connected to
Vss or Vdd do not need further bypassing.
Keys that cannot calibrate for some reason require 5 full cal
cycles before they report as errors. The device can report back
during the calibration interval that the key(s) affected are still in
calibration via status function bits. Errors can be observed after
a cal cycle using the 0x8k command (see Section 4.16).
2.10.2 PCB Cleanliness
All capacitive sensors should be treated as highly sensitive
circuits which can be influenced by stray conductive leakage
paths. QT devices have a basic resolution in the femtofarad
range; in this region, there is no such thing as ‘no clean flux’.
Flux absorbs moisture and becomes conductive between
2.13 Reset Input
The /RST pin can be used to reset the device to simulate a
power down cycle, in order to bring the part up into a known
lQ
6
QT60248-AS R4.02/0405
QUANTUM [ QUANTUM RESEARCH GROUP ]
