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QT60168-ASG 参数 Datasheet PDF下载

QT60168-ASG图片预览
型号: QT60168-ASG
PDF下载: 下载PDF文件 查看货源
内容描述: 16日, 24个重点QMATRIX集成电路 [16, 24 KEY QMATRIX ICs]
分类和应用: PC
文件页数/大小: 28 页 / 867 K
品牌: QUANTUM [ QUANTUM RESEARCH GROUP ]
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Figure 2-4 X-Drive Pulse Roll-off and Dwell Time  
Figure 2-6 Recommended Key Structure  
‘T’ should ideally be similar to the complete thickness the fields need to  
penetrate to the touch surface. Smaller dimensions will also work but will give  
less signal strength. If in doubt, make the pattern coarser.  
Lost charge due to  
inadequate settling  
before end of dwell time  
X drive  
Dwell time  
Y gate  
Figure 2-5 Probing X-Drive Waveforms With a Coin  
The upper limits of Rx and Ry are reached when the signal  
level and hence key sensitivity are clearly reduced. The limits of  
Rx and Ry will depending on key geometry and stray  
capacitance, and thus an oscilloscope is required to determine  
optimum values of both.  
The upper limit of Rx can vary depending on key geometry and  
stray capacitance, and some experimentation and an  
oscilloscope are required to determine optimum values.  
Dwell time is the duration in which charge coupled from X to Y  
is captured. Increasing Rx values will cause the leading edge of  
the X pulses to increasingly roll off, causing the loss of captured  
charge (and hence loss of signal strength) from the keys  
(Figure 2-4). The dwell time of these parts is fixed at 375ns. If  
the X pulses have not settled within 375ns, key gain will be  
reduced; if this happens, either the stray capacitance on the X  
line(s) should be reduced (by a layout change, for example by  
reducing X line exposure to nearby ground planes or traces), or,  
the Rx resistor needs to be reduced in value (or a combination  
of both approaches).  
Increasing the burst length (BL) parameter will increase the  
signal strengths as will increasing the sampling resistor (Rs)  
values.  
One way to determine X line settling time is to monitor the fields  
using a patch of metal foil or a small coin over the key (Figure  
2-5). Only one key along a particular X line needs to be  
observed, as each of the keys along that X line will be identical.  
The 250ns dwell time should be exceed the observed 95%  
settling of the X-pulse by 25% or more.  
2.8 Matrix Series Resistors  
The X and Y matrix scan lines should use series resistors  
(referred to as Rx and Ry respectively) for improved EMI  
performance.  
In almost all case, Ry should be set equal to Rx, which will  
ensure that the charge on the Y line is fully captured into the Cs  
capacitor.  
X drive lines require them in most cases to reduce edge rates  
and thus reduce RF emissions. Typical values range from 1K to  
20K ohms.  
2.9 Key Design  
Circuits can be constructed out of a variety of materials  
including flex circuits, FR4, and even inexpensive single-sided  
CEM-1.  
Y lines need them to reduce EMC susceptibility problems and in  
some extreme cases, ESD. Typical Y values range around 1K  
ohms. Y resistors act to reduce noise susceptibility problems by  
forming a natural low-pass filter with the Cs capacitors.  
The actual internal pattern style is not as important as is the  
need to achieve regular X and Y widths and spacings of  
sufficient size to cover the desired graphical key area or a little  
bit more; ~3mm oversize is acceptable in most cases, since the  
key’s electric fields drop off near the edges anyway. The overall  
key size can range from 10mm x 10mm up to 100mm x 100mm  
but these are not hard limits. The keys can be any shape  
including round, rectangular, square, etc. The internal pattern  
It is essential that the Rx and Ry resistors and Cs capacitors be  
placed very close to the chip. Placing these parts more than a  
few millimeters away opens the circuit up for high frequency  
interference problems (above 20MHz) as the trace lengths  
between the components and the chip start to act as RF  
antennae.  
lQ  
5
QT60248-AS R4.02/0405  
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