The host can monitor the progress of the reset by checking the
status byte for recalibration, using command 0x05. The
complete reset sequence is as follows:
4.2 Enter Setups Mode - 0x01
This command is used to initiate the Setups block transfer from
Host to QT.
1. Reset command received by QT
2. Response byte (0xFB) recovered by host
3. DRDY floats high
The command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command. After the 2nd 0x01 from the
host, the QT will stop scanning keys and reply with the
character 0xFE. In SPI mode this character must be shifted out
by sending a null (0x00) from the host. This command
suspends normal sensing starting from the receipt of the
second 0x01. A failure of the command will cause a timeout.
4. 20ms elapses until device completes reset
5. DRDY clamped low
6. 4ms or 22ms elapses - (see Section 2.12)
7. DRDY floats high again - device reset has completed
If the host does not recover the response byte in step 2, the
QT device will self-reset within 2 seconds.
Each byte in the block must arrive at the QT no later than
100ms after the previous one or a timeout will occur.
4.5 General Status - 0x05
This command returns the general status bits. They are as
follows:
Any timeout will cause the device to cancel the block load and
go back to normal operation.
If no response comes back, the command was not received and
the device should preferably be reset from the host by hardware
reset just in case there are any other problems.
BIT
7
Description
Reserved
6
1= communications error
1= FMEA failure detected
Reserved
1= mains sync error
1= calibration has failed on an
enabled key or, an LSL failure
1= any key in calibration
1= any key in detect
If 0xFE is received by the host, then the host should begin to
transmit the block of Setups to the QT. DRDY handshakes the
data. The delay between bytes can be as short as 10µs but the
host can make it longer than this if required, but no more than
100ms. The last byte the host should send is the CRC for the
block of data only, ie the command itself should not be folded
into the CRC.
5
4
3
2
1
0
After the block transfer the QT will check the CRC and respond
with 0x00 if there was an error. Regardless, it will program the
internal eeprom. If the CRC was correct it will reply with a
second 0xFE after the eeprom was programmed.
Notes:
Bit 7: Reserved
Bit 6: Set if a communications failure, such as an unrecognized
command. This bit can be reset by sending command 0x0f
(“last command command”) repeatedly until a response of 0xf0
is received.
At the end of the full block load sequence, the device restarts
sensing without recalibration. It is highly recommended that
the part be reset after a block load to allow the part to
properly initialize itself, clear any setup flags, using the reset
command or the reset pin.
Bit 5: Set if an FMEA error was detected during operation. See
Section 2.16. A further amplification of what the FMEA error
consisted of is described in Section 4.9.
4.3 Cal All - 0x03
Bit 4: Reserved
This command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command.
Bit 3: Set if there was a mains sync error, for example there
was no Sync signal detected within the allotted 100ms amount
of time. See Section 5.10. This condition is not necessarily fatal
to operation, however the device will operate very slowly and
may suffer from noise problems if the sync feature was required
for noise reasons.
After the 2nd 0x03 from the host, the QT will reply with the
character 0xFC. Shortly thereafter the device will recalibrate all
keys and restart operation.
If no 0xFC comes back, the command was not properly
received and the device should preferably be reset.
Bit 2: Reports either a cal failure (failed in 5 sequential
attempts) on any enabled key or, that an enabled key has a
very low signal reference value, lower than the user-settable
LSL value (Section 5.12). Disabled keys do not cause this bit 2
error flag to be set even if they generate an error flag in the
The host can monitor the progress of the recalibration by
checking the status byte, using command 0x05.
A key will show an error flag (via command 0x8k) indicating the
key has failed calibration if its signal is too noisy or if its signal is 0x8k response.
below the low signal threshold. A key is deemed too noisy if, at
Bit 1: Set if any key is in the process of calibrating.
the end of calibration, the signal is no longer between its
computed negative hysteresis level and positive thresholds.
Bit 0: Set if any key is in detection (touched).
A CRC byte is appended to the response to the 0x05 command;
this CRC folds in the command value 0x05 itself initially.
4.4 Force Reset - 0x04
The command must be repeated 2x within 100ms or the
command will fail; the repeating command must be sequential
without any intervening command. After the 2nd 0x04, the QT
will reply with the character 0xFB just prior to executing the
reset operation.
lQ
12
QT60248-AS R4.02/0405
QUANTUM [ QUANTUM RESEARCH GROUP ]
