QN8007B/8007LB
0->1 or 1->0
0->0 or 1->1
A new set (8 Byte) of data is received
New data is in receiving
rsvd
rr
Reserved
6:0
Word: XLT3 Address: 49h
Bit 7
(MSB)
Bit 0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(LSB)
rsvd
wo
rsvd
rsvd
wo
rsvd
wo
xtlbyp
wo
rsvd
wo
rsvd
wo
rsvd
wo
wo
Bit
Symbol
Default
Description
7:5
4
rsvd
rrr
0
Reserved
Direct inject crystal oscillation from external XCLK pin.
XTLBYP
0
1
Use internal crystal oscillator.
Inject external clock from pin XCLK.
3:0
rsvd
rrrr
Reserved
Word: PAC_CAL Address: 59h
Bit 7
Bit 0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSB)
pac_req
wo
(LSB)
pacap[0]
rw
pac_dis
wo
pacap[5]
rw
pacap[4]
rw
pacap[3]
rw
pacap[2]
rw
pacap[1]
rw
Bit
Symbol
Default
Description
7
PAC_REQ
0
Manually request PA tuning cap and gain calibration
PAC_REQ
Calibration request
1
0
Reset the calibration
At the 1->0 transition, calibration starts
6
PAC_DIS
0
Disable PA tuning cap calibration and use PACAP as circuit setting
PAC_DIS
Status of calibration
Use calibrated value
No calibration and use user-set value
0
1
Rev 2.09 (11/09)
Confidential A
Copyright ©2009 by Quintic Corporation
Confidential Information contained herein is covered under Non-Disclosure Agreement (NDA).
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