QN8006B/8006LB
Word: REG_DAC Address: 4Fh
Bit 7
Bit 0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSB)
rsvd
ro
(LSB)
dacg[0]
rw
rsvd
ro
rsvd
ro
rsvd
ro
rsvd
ro
rsvd
ro
dacg[1]
rw
Bit
Symbol
Default
Description
7:2
1:0
rsvd
rrrr rr
01
Reserved
DAC output stage gain:
DACG[1:0]
00
01
10
11
3dB
0dB
-3dB
-6dB
Word: PAC_CAL Address: 59h
Bit 7
Bit 0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSB)
pac_req
wo
(LSB)
pacap[0]
rw
pac_dis
wo
pacap[5]
rw
pacap[4]
rw
pacap[3]
rw
pacap[2]
rw
pacap[1]
rw
Bit
Symbol
Default
Description
7
PAC_REQ
0
Manually request PA tuning cap and gain calibration
PAC_REQ
Calibration request
1
0
Reset the calibration
At the 1->0 transition, calibration starts
6
PAC_DIS
0
Disable PA tuning cap calibration and use PACAP as circuit setting
PAC_DIS
Status of calibration
0
1
Use calibrated value
No calibration and use user-set value
User-set PA Tuning cap. Each LSB is 0.3pF. The read back value is the
calibration result.
5:0 PACAP[5:0] 000000
Rev 2.08 (04/10)
Copyright ©2010 by Quintic Corporation
Page 52
Confidential A
Confidential Information contained herein is covered under Non-Disclosure Agreement (NDA).
QUANTUM [ QUANTUM RESEARCH GROUP ]
