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HYS64D128320HU-5-B 参数 Datasheet PDF下载

HYS64D128320HU-5-B图片预览
型号: HYS64D128320HU-5-B
PDF下载: 下载PDF文件 查看货源
内容描述: 42184针无缓冲双倍数据速率内存模块 [42184-Pin Unbuffered Double-Data-Rate Memory Modules]
分类和应用: 双倍数据速率
文件页数/大小: 42 页 / 2531 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HYS[64/72]D[32/64/128]xxx[G/H]U–[5/6]–B  
Unbuffered DDR SDRAM Modules  
TABLE 8  
Electrical Characteristics and DC Operating Conditions  
Parameter  
Symbol  
Values  
Unit Note1) / Test Condition  
Min.  
Typ.  
Max.  
Device Supply Voltage  
Device Supply Voltage  
Output Supply Voltage  
Output Supply Voltage  
EEPROM supply voltage  
VDD  
2.3  
2.5  
2.3  
2.5  
2.3  
0
2.5  
2.6  
2.5  
2.6  
2.5  
2.7  
2.7  
2.7  
2.7  
3.6  
0
V
V
V
V
V
V
fCK 166 MHz  
CK > 166 MHz 2)  
fCK 166 MHz 3)  
CK > 166 MHz 2)3)  
VDD  
f
VDDQ  
VDDQ  
VDDSPD  
f
Supply Voltage, I/O Supply  
Voltage  
VSS,  
VSSQ  
4)  
5)  
Input Reference Voltage  
VREF  
VTT  
0.49 × VDDQ 0.5 × VDDQ 0.51 × VDDQ  
V
V
I/O Termination Voltage  
(System)  
V
REF – 0.04  
V
REF + 0.04  
8)  
8)  
8)  
Input High (Logic1) Voltage VIH(DC)  
Input Low (Logic0) Voltage VIL(DC)  
V
REF + 0.15  
V
V
V
DDQ + 0.3  
REF – 0.15  
DDQ + 0.3  
V
V
V
0.3  
0.3  
Input Voltage Level, CK and VIN(DC)  
CK Inputs  
8)6)  
7)  
Input Differential Voltage, CK VID(DC)  
and CK Inputs  
0.36  
0.71  
–2  
V
DDQ + 0.6  
V
VI-Matching Pull-up Current VIRatio  
to Pull-down Current  
1.4  
2
µA  
Input Leakage Current  
II  
Any input 0 V VIN VDD; All  
other pins not under test = 0 V  
8)9)  
Output Leakage Current  
IOZ  
–5  
5
µA  
DQs are disabled; 0 V VOUT  
VDDQ  
8)  
Output High Current, Normal IOH  
Strength Driver  
–16.2  
mA  
mA  
V
OUT = 1.95 V 8)  
OUT = 0.35 V 8)  
Output Low Current, Normal IOL  
16.2  
V
Strength Driver  
1) 0 °C TA 70 °C  
2) DDR400 conditions apply for all clock frequencies above 166 MHz  
3) Under all conditions, VDDQ must be less than or equal to VDD  
4) Peak to peak AC noise on VREF may not exceed ± 2% VREF (DC). VREF is also expected to track noise variations in VDDQ  
.
.
5)  
V
TT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF, and  
must track variations in the DC level of VREF  
ID is the magnitude of the difference between the input level on CK and the input level on CK.  
.
6)  
V
7) The ration of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature  
and voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between  
pull-up and pull-down drivers due to process variation.  
8) Inputs are not recognized as valid until VREF stabilizes.  
9) Values are shown per component  
Rev. 1.22, 2007-01  
15  
03292006-CXBY-V2JX  
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