欢迎访问ic37.com |
会员登录 免费注册
发布采购

HYI18T1G800C2C-3.7 参数 Datasheet PDF下载

HYI18T1G800C2C-3.7图片预览
型号: HYI18T1G800C2C-3.7
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 128MX8, 0.5ns, CMOS, PBGA60, PLASTIC, TFBGA-60]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 70 页 / 3976 K
品牌: QIMONDA [ QIMONDA AG ]
 浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第31页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第32页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第33页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第34页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第36页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第37页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第38页浏览型号HYI18T1G800C2C-3.7的Datasheet PDF文件第39页  
Internet Data Sheet  
HY[B/I]18T1G[40/80/16]0C2[C/F](L)  
1-Gbit Double-Data-Rate-Two SDRAM  
5.6  
Overshoot and Undershoot Specification  
This chapter contains Overshoot and Undershoot Specification.  
TABLE 31  
AC Overshoot / Undershoot Specification for Address and Control Pins  
Parameter  
DDR2-533  
DDR2-667  
DDR2-800  
DDR2-1066  
Unit  
Maximum peak amplitude allowed for  
overshoot area  
0.9  
0.9  
0.9  
0.9  
V
Maximum peak amplitude allowed for  
undershoot area  
0.9  
0.9  
0.9  
0.9  
V
Maximum overshoot area above VDD  
Maximum undershoot area below VSS  
1.00  
1.00  
0.8  
0.8  
0.66  
0.66  
0.5  
0.5  
V-ns  
V-ns  
FIGURE 6  
AC Overshoot / Undershoot Diagram for Address and Control Pins  
0D[LPXPꢋ$PSOLWXGHꢋꢋ  
9ROWVꢋꢍ9ꢎ  
2YHUVKRRWꢋ$UHD  
9''  
966  
8QGHUVKRRWꢋ$UHD  
0D[LPXPꢋ$PSOLWXGHꢋꢋ  
7LPHꢋꢍQVꢎ  
03(7ꢀꢅꢀꢀ  
Rev. 1.60, 2008-08  
35  
09262007-3YK7-BKKG  
 复制成功!