Data Sheet.
HY[B/E]18L512160BF-7.5
512-Mbit Mobile-RAM
2.4.10
POWER DOWN
Power-down is entered when CKE is registered LOW (no
accesses can be in progress). If power-down occurs when all
banks are idle, this mode is referred to as precharge power-
down. If power-down occurs when there is a row active in any
bank, this mode is referred to as active power-down. Entering
power-down deactivates the input and output buffers,
excluding CLK and CKE. CKE LOW must be maintained
during power-down.
FIGURE 45
Power Down Entry Command
#,+
#+%
#3
Power-down duration is limited by the refresh requirements of
2!3
#!3
7%
the device (tREF).
The power-down state is synchronously exited when CKE is
registered HIGH (along with
a NOP or DESELECT
command). One clock delay is required for power down entry
and exit.
!ꢁꢂ!ꢃꢄ
"!ꢁꢅ"!ꢃ
ꢀ $ONgT #ARE
FIGURE 46
Power Down Entry and Exit
#,+
T20
#+%
02%
./0
./0
./0
6ALID
6ALID
6ALID
#OMMAND
!DDRESS
0RE !LL
!ꢃꢄ ꢅ!0ꢆ
$1
(IGHꢂ:
0OWER $OWN
%NTRY
%XIT FROM
0OWER $OWN
!NY
#OMMAND
0RECHARGE 0OWER $OWN MODE SHOWNꢀ ALL BANKS ARE IDLE AND T20 MET
WHEN 0OWER $OWN %NTRY #OMMAND IS ISSUED
ꢁ $ONgT #ARE
Rev. 1.22, 2006-12
01132005-06IU-IGVM
42
QIMONDA [ QIMONDA AG ]
