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HYE18L256160BFX-7.5 参数 Datasheet PDF下载

HYE18L256160BFX-7.5图片预览
型号: HYE18L256160BFX-7.5
PDF下载: 下载PDF文件 查看货源
内容描述: DRAM的移动应用256兆移动-RAM [DRAMs for Mobile Applications 256-Mbit Mobile-RAM]
分类和应用: 动态存储器
文件页数/大小: 48 页 / 1590 K
品牌: QIMONDA [ QIMONDA AG ]
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HY[B/E]18L256160B[C/F]X-7.5  
256-Mbit Mobile-RAM  
Functional Description  
Field Bits Type Description  
PASR [2:0]  
w
Partial Array Self Refresh  
000 all banks (default)  
001 1/2 array (BA1 = 0)  
010 1/4 array (BA1 = BA0 = 0)  
101 1/8 array (BA1 = BA0 = RA12 = 0)  
110 1/16 array (BA1 = BA0 = RA12 = RA11 = 0)  
Note:All other bit combinations are RESERVED.  
2.2.1.6  
Partial Array Self Refresh (PASR)  
Partial Array Self Refresh is a power-saving feature specific to Mobile RAMs. With PASR, self refresh may be  
restricted to variable portions of the total array. The selection comprises all four banks, two banks, one bank, half  
of one bank, and a quarter of one bank. Data written to the non activated memory sections will get lost after a  
period defined by tREF (cf. Table 13).  
2.2.1.7  
Temperature Compensated Self Refresh (TCSR) with On-Chip Temperature  
Sensor  
DRAM devices store data as electrical charge in tiny capacitors that require a periodic refresh in order to retain  
the stored information. This refresh requirement heavily depends on the die temperature: high temperatures  
correspond to short refresh periods, and low temperatures correspond to long refresh periods.  
The Mobile-RAM is equipped with an on-chip temperature sensor which continuously senses the actual die  
temperature and adjusts the refresh period in Self Refresh mode accordingly. This makes any programming of the  
TCSR bits in the Extended Mode Register obsolete. It also is the superior solution in terms of compatibility and  
power-saving, because  
it is fully compatible to all processors that do not support the Extended Mode Register  
it is fully compatible to all applications that only write a default (worst case) TCSR value, e.g. because of the  
lack of an external temperature sensor  
it does not require any processor interaction for regular TCSR updates  
2.2.1.8  
Selectable Drive Strength  
The drive strength of the DQ output buffers is selectable via bits A5 and A6 and shall be set load dependent. The  
half drive strength is suitable for typical Mobile-RAM applications.  
Data Sheet  
11  
Rev. 1.11, 2007-01  
07142005-CR47-RB2E  
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