HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Electrical CharacteristicsAC Characteristics
Table 21
AC Characteristics1)2)3)4) (cont’d)
Parameter
Symbol
- 7.5
Unit Notes
min.
14
max.
9)
WRITE recovery time
tWR
—
ns
PRECHARGE command period
Refresh period (4096 rows)
Self refresh exit time
tRP
19
—
1
—
64
—
ns
tREF
tSREX
ms
tCK
—
—
1) 0 °C ≤ TC ≤ 70 °C (comm.); -25 °C ≤ TC ≤ 85 °C (ext.); VDD = VDDQ = 1.70V to 1.95V;
2) All parameters assumes proper device initialization.
3) AC timing tests measured at 0.9 V.
4) The transition time is measured between VIH and VIL; all AC characteristics assume tT = 1 ns.
5) Specified tAC and tOH parameters are measured with a 30 pF capacitive load only as shown in Figure 47.
6) If tT(CLK) > 1 ns, a value of (tT/2 - 0.5) ns has to be added to this parameter.
7) If tT > 1 ns, a value of [0.5 x (tT - 1)] ns has to be added to this parameter.
8) These parameter account for the number of clock cycles and depend on the operating frequency, as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
9) The write recovery time of tWR = 14 ns allows the use of one clock cycle for the write recovery time when fCK ≤ 72 MHz.
With fCK > 72 MHz two clock cycles for tWR are mandatory. Qimonda recommends to use two clock cycles for the write
recovery time in all applications.
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Figure 47 Test Load for DQ Pins
Data Sheet
47
Rev. 1.71, 2007-01
05282004-NZNK-8T0D