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HYB39S128400FEL-7 参数 Datasheet PDF下载

HYB39S128400FEL-7图片预览
型号: HYB39S128400FEL-7
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位同步DRAM [128-MBit Synchronous DRAM]
分类和应用: 存储内存集成电路光电二极管动态存储器时钟
文件页数/大小: 21 页 / 1376 K
品牌: QIMONDA [ QIMONDA AG ]
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Data Sheet  
HY[B/I]39S128[40/80/16][0/7]F[E/T](L)  
128-MBit Synchronous DRAM  
TABLE 11  
IDD Conditions  
Parameter  
Symbol  
Operating Current  
IDD1  
One bank active, Burst length = 1  
Precharge Standby Current in Power Down Mode  
Recharge Standby Current in Non-Power Down Mode  
IDD2P  
IDD2N  
IDD3N  
IDD3P  
IDD4  
No Operating Current  
Active state (max. 4 banks)  
Burst Operating Current  
Read command cycling  
Auto Refresh Current  
Auto Refresh command cycling  
IDD5  
IDD6  
Self Refresh Current (standard components)  
Self Refresh Mode, CKE=0.2 V, tCK=infinity  
Self Refresh Current (low power components)  
Self Refresh Mode, CKE=0.2 V, tCK=infinity  
TABLE 12  
DD Specifications and Conditions  
I
Symbol  
–7  
Unit  
Note/ Test Condition  
Max.  
1)2)3)4)  
1)2)  
IDD1  
t
RC = tRC(min), IO = 0 mA  
80  
2
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
IDD2P  
IDD2N  
IDD3N  
IDD3P  
IDD4  
CS =VIH (min.), CKE VIL(max)  
CS =VIH (min.), CKEVIH(min)  
CS = VIH(min), CKE VIH(min.)  
CS = VIH(min), CKE VIL(max.)  
1)2)  
22  
35  
5
1)2)  
1)2)  
1)2)4)  
1)2)5)  
1)2)  
65  
146  
25  
3
IDD5  
t
t
RFC= tRFC(min)  
RFC= 15.6 μs  
IDD6  
1)2) Standard components  
1) Low power components at 85 °C  
0.8  
1) Currents values will be added when available.  
2) TA = 0 to 70 °C; VSS = 0 V; VDD, VDDQ = 3.3 V ± 0.3 V  
3) These parameters depend on the cycle rate. All values are measured at 133 MHz for -7 with the outputs open. Input signals are changed  
once during tCK  
.
4) These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3 and BL=4 is assumed and  
the VDDQ current is excluded.  
5)  
tRFC= tRFC(min) “burst refresh”, tRFC= 15.6 μs “distributed refresh”.  
Rev. 1.32, 2007-10  
14  
10122006-I6LJ-WV3H  
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