HYB25D256[400/800/160]B[T/C](L)
256-Mbit Double Data Rate SDRAM
Functional Description
Maximum DQSS
T1
T2
T3
T4
T5
T6
CK
CK
Write
NOP
NOP
NOP
NOP
PRE
Command
tWR
BA (a or all)
BA a, COL b
Address
tRP
tDQSS (max)
DQS
DQ
DI a-b
DM
Minimum DQSS
T1
T2
T3
T4
T5
T6
CK
CK
Write
NOP
NOP
NOP
NOP
tWR
PRE
Command
BA (a or all)
BA a, COL b
Address
tRP
tDQSS (min)
DQS
DQ
DI a-b
DM
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
tWR is referenced from the first positive CK edge after the last data in pair.
Don’t Care
A10 is Low with the Write command (Auto Precharge is disabled).
Figure 26 Write to Precharge: Non-Interrupting (Burst Length = 4)
Data Sheet
43
Rev. 1.21, 2004-07
02102004-TSR1-4ZWW
QIMONDA [ QIMONDA AG ]
