HYB18T512xxxBF–[2.5…5]
512-Mbit Double-Data-Rate-Two SDRAM
Table 34
IDD Measurement Conditions
Parameter
Symbol Note
Self-Refresh Current
IDD6
CKE ≤ 0.2 V; external clock off, CK and CK at 0 V; Other control and address inputs are floating,
Data bus inputs are floating.
7)
Operating Bank Interleave Read Current
IDD7
1. All banks interleaving reads, IOUT = 0 mA; BL = 4, CL = CL(IDD), AL = tRCD(IDD) -1 × tCK(IDD); tCK
= tCK(IDD), tRC = tRC(IDD), tRRD = tRRD(IDD); CKE is HIGH, CS is HIGH between valid commands.
Address bus inputs are stable during deselects; Data bus is switching.
2. Timing pattern:
DDR2-400-333: A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D D (11 clocks)
DDR2-533-333: A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D D (15 clocks)
DDR2-667-444: A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D D (19 clocks)
DDR2-667-555: A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D D D (20 clocks)
DDR2-800-555: A0 RA0 D D D A1 RA1 D D D A2 RA2 D D D A3 RA3 D D D D D(22 clocks)
DDR2-800-666: A0 RA0 D D D A1 RA1 D D D A2 RA2 D D D A3 RA3 D D D D D D(23 clocks)
1) VDDQ = 1.8 V ± 0.1 V; VDD = 1.8 V ± 0.1 V
2) IDD specifications are tested after the device is properly initialized.
3) IDD parameter are specified with ODT disabled.
4) Data Bus consists of DQ, DM, DQS, DQS, RDQS, RDQS, LDQS, LDQS, UDQS and UDQS.
5) Definitions for IDD: see Table 35
6) Timing parameter minimum and maximum values for IDD current measurements are defined in chapter 7..
7) A = Activate, RA = Read with Auto-Precharge, D=DESELECT
Table 35
Parameter
LOW
Definition for IDD
Description
defined as VIN ≤ VIL(ac).MAX
defined as VIN ≥ VIH(ac).MIN
HIGH
STABLE
FLOATING
SWITCHING
defined as inputs are stable at a HIGH or LOW level
defined as inputs are VREF = VDDQ / 2
defined as: Inputs are changing between high and low every other clock (once per two clocks)
for address and control signals, and inputs changing between high and low every other clock
(once per clock) for DQ signals not including mask or strobes
Internet Data Sheet
34
Rev. 1.05, 2007-01
03292006-YBYM-WG0Z
QIMONDA [ QIMONDA AG ]
