Internet Data Sheet
HYB18TC1G[80/16]0AF
1-Gbit DDR2 SDRAM
FIGURE 1
Pin Configuration for ×8 components, P-TFBGA-68 (top view)
ꢁ
ꢇ
ꢅ
ꢃ
ꢈ
$
%
&
'
(
)
ꢂ
ꢆ
ꢊ
ꢉ
1&
1&
1&
1&
18ꢄ
5'46
9''
966
9664
9''4
'46
'0ꢄ
5'46
9664
9664
'4ꢂ
'46
'4ꢆ
9''4
9''4
9''4
9''4
*
+
-
'4ꢁ
'4ꢀ
9664
9664
'4ꢃ
'4ꢅ
'4ꢇ
966'/
5$6
&$6
$ꢇ
'4ꢈ
9''/
95()
966
9''
&.
&.
.
/
&.(
%$ꢀ
$ꢁꢀꢄ$3
$ꢅ
:(
%$ꢁ
$ꢁ
2'7
1&ꢋꢌ%$ꢇ
&6
9''
0
1
3
5
7
$ꢀ
966
$ꢈ
$ꢂ
$ꢃ
966
$ꢆ
$ꢉ
$ꢁꢁ
1&
$ꢊ
9''
$ꢁꢇ
1&
1&ꢋꢌ$ꢁꢅ
8
9
:
1&
1&
1&
1&
0337ꢀꢁꢀꢀ
Notes
3. When enabled, RDQS & RDQS are used as strobe
signals during reads.
4. VDDL and VSSDL are power and ground for the DLL. They
1. RDQS / RDQS are enabled by EMRS(1) command.
2. If RDQS / RDQS is enabled, the DM function is disabled
are connected on the device from VDD, VDDQ,
VSSQ
VSS and
.
Rev. 1.11, 2006-09
9
03292006-PJAE-UQLG
QIMONDA [ QIMONDA AG ]
