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HYB18T2G402BF-3.7 参数 Datasheet PDF下载

HYB18T2G402BF-3.7图片预览
型号: HYB18T2G402BF-3.7
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 512MX4, 0.8ns, CMOS, PBGA71, GREEN, PLASTIC, TFBGA-71]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 55 页 / 3279 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HYB18T2G[40/80]2BF  
2-Gbit Dual Die Double-Data-Rate-Two SDRAM  
TABLE 4  
Abbreviations for Ball Type  
Abbreviation  
Description  
I
Standard input-only ball. Digital levels.  
Output. Digital levels.  
I/O is a bidirectional input/output signal.  
Input. Analog levels.  
Power  
O
I/O  
AI  
PWR  
GND  
NC  
Ground  
Not Connected  
TABLE 5  
Abbreviations for Buffer Type  
Abbreviation  
Description  
SSTL  
Serial Stub Terminated Logic (SSTL_18)  
Low Voltage CMOS  
LV-CMOS  
CMOS  
OD  
CMOS Levels  
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and  
allows multiple devices to share as a wire-OR.  
Rev. 1.10, 2007-11  
9
10192006-0E3U-5BSU  
Date: 2007-11-05