Advance Internet Data Sheet
HY[B/E]18M1G[16/32]0DF–[6/7.5]
1Gbit DDR Mobile-RAM
2
Functional Description
Qimonda Mobile DRAM are high-speed CMOS, dynamic
random-access memory containing 1073741824 bits. It is
internally configured as a quad-bank DRAM.
are used to select the bank and row to be accessed [BA0,BA1
select the banks, A0 - A13 (x16) and A0 - A12 (x32) select the
row]. The address bits registered coincident with the READ or
WRITE command are used to select the starting column
location for the burst access.
READ and WRITE accesses to DRAM are burst oriented;
accesses start at a selected location and continue for a
programmed number of locations in
a
programmed
Prior to normal operation, DRAM must be initialized. The
following sections provide detailed information covering
device initialization, register definition, command description
and device operation.
sequence. Accesses begin with the registration of an ACTIVE
command, followed by a READ or WRITE command. The
address bits registered coincident with the ACTIVE command
2.1
Register Definition
2.1.1
Mode Register
The Mode Register is used to define the specific mode of
operation of the DRAM. This definition includes the selection
of a burst length (bits A0-A2), a burst type (bit A3) and a CAS
latency (bits A4-A6). The Mode Register is programmed via
the MODE REGISTER SET command (with BA0 = 0 and BA1
= 0) and will retain the stored information until it is
programmed again or the device loses power.
The Mode Register must be loaded when all banks are idle,
and the controller must wait the specified time before initiating
any subsequent operation. Violating either of these
requirements results in unspecified operation.
Reserved states should not be used, as unknown operation
or incompatibility with future versions may result.
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TABLE 5
Mode Register Definition (BA[1:0] = 00B)
Field Bits
Type Description
CL
[6:4]
w
CAS Latency
010B CL 2
011B CL 3
Note: All other bit combinations are RESERVED.
BT
3
w
Burst Type
0B
1B
BT Sequential
BT Interleaved
Rev. 0.81, 2008-04
02252008-RRTW-LCC3
7