HY[B/E]18L256160B[C/F]X-7.5
256-Mbit Mobile-RAM
Overview
1
Overview
1.1
Features
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4 banks × 4 Mbit × 16 organization
Fully synchronous to positive clock edge
Four internal banks for concurrent operation
Programmable CAS latency: 2, 3
Programmable burst length: 1, 2, 4, 8 or full page
Programmable wrap sequence: sequential or interleaved
Programmable drive strength
Auto refresh and self refresh modes
8192 refresh cycles / 64 ms
Auto precharge
Commercial (0°C to +70°C) and Extended (-25°C to +85°C) operating temperature range
54-ball P-VFBGA package (12.0 × 8.0 × 1.0 mm)
RoHS Compliant Product1)
Power Saving Features
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Low supply voltages: VDD = 1.70V to 1.95V, VDDQ = 1.70V to 1.95V
Optimized self refresh (IDD6) and standby currents (IDD2/IDD3
)
Programmable Partial Array Self Refresh (PASR)
Temperature Compensated Self-Refresh (TCSR), controlled by on-chip temperature sensor
Power-Down and Deep Power Down modes
Table 1
Performance
Part Number Speed Code
- 7.5
133
5.4
Unit
MHz
ns
Speed Grade
Access Time (tACmax
)
CL = 3
CL = 2
CL = 3
CL = 2
6.0
ns
Clock Cycle Time (tCKmin
)
7.5
ns
9.5
ns
Table 2
Item
Memory Addressing Scheme
Addresses
BA0, BA1
A0 - A12
A0 - A8
Banks
Rows
Columns
1)RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and
electronic equipment as defined in the directive 2002/95/EC issued by the European Parliament and of the Council
of 27 January 2003. These substances include mercury, lead, cadmium, hexavalent chromium, polybrominated
biphenyls and polybrominated biphenyl ethers.
Data Sheet
3
Rev. 1.11, 2007-01
07142005-CR47-RB2E
QIMONDA [ QIMONDA AG ]
