Internet Data Sheet
HYB18H256321BF
256-Mbit GDDR3
5
Package
5.1
Package Outline
FIGURE 18
Package Outline PG-TFBGA-136-060
ꢂꢅ
ꢄꢃꢂꢈ -!8ꢃ
ꢄꢃꢂꢀ -!8ꢃ
ꢂꢉ X ꢄꢃꢈ ꢊ ꢂꢀꢃꢈ
ꢄꢃꢈ
ꢄꢃꢀ
ꢆꢁ
ꢂꢁ
ꢀꢁ
"
ꢀꢁ
ꢅꢁ
ꢇꢁ
!
ꢄꢃꢂ
#
ꢄꢃꢂ
#
ꢂꢇꢉX
ꢄꢃꢄꢆ
ꢄꢃꢅꢆ
-
ꢄꢃꢂꢆ
! "
3%!4).' 0,!.%
#
#
#
-
ꢄꢃꢄꢈ
,EAD FREE SOLDER BALLS ꢍGREEN SOLDER BALLSꢁ
ꢂꢁ "AD UNIT MARKING ꢍ"5-ꢁ ꢍLIGHT ꢊ GOODꢁ
ꢀꢁ -IDDLE OF PACKAGES EDGES
ꢇꢁ 0ACKAGE ORIENTATION MARK !ꢂ
ꢅꢁ 3"!ꢋFIDUCIAL ꢍSOLDER BALL ATTACHꢁ
ꢆꢁ /PENING IN SOLDER RESIST
&0/?0'ꢋ4&"'!??ꢋꢂꢇꢉꢋꢄꢉꢄ
Note: The package is conforming with JEDEC MO-207i, VAR DR-z.
Rev. 0.80, 2007-09
36
09132007-07EM-7OYI