PACE1750A
TERMINAL CONNECTIONS
Case Outlines: Dual-In-Line (Case X) and Dual-In-Line with Gull-Wing Leads (Case T)
Terminal
Number
Terminal
Symbol
Terminal
Number
Terminal
Symbol
Terminal
Number
Terminal
Symbol
1
GND
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
IB
IB
IB
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
AS
AS
13
14
15
1
0
2
CON REQ
DMA EN
3
GND
4
TRIGO RST
RESET
MEM PRT ER
MEM PAR ER
EXT ADR ER
AK
AK
AK
AK
3
2
1
0
5
6
NML PWRUP
TIMER CLK
UNRCV ER
7
SYSFLT
SYSFLT
MAJ ER
GND
0
8
CPU CLK
STRBA
STRBD
BUS REQ
RDYA
1
9
IB
IB
IB
IB
IB
IB
IB
IB
IB
IB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
PWRDN INT
USR INT
0
USR INT
RDYD
1
USR INT
R/W
2
USR INT
D/I
3
USR INT
M/IO
4
USR INT
BUS BUSY
BUS GNT
BUS LOCK
SNEW
VCC
5
IOL INT
1
VCC
IOL INT
2
IB
IB
IB
AS
AS
10
11
12
3
2
Note: For the 30 MHz and 40 MHz devices, Pins 19 and 46 are connected as shown. For the 15 MHz and 20 MHz devices, these pins are not internally connected to the die.
Do c um e nt # MICRO-3 Re v. C
Pa g e 17 o f 24
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
